Commit b1b865e3 authored by egousiou's avatar egousiou

modif after code review

git-svn-id: http://svn.ohwr.org/cern-fip/trunk/hdl/design@251 7f0067c9-7624-46c7-bd39-3fb5400c0213
parent 5de66e26
......@@ -19,9 +19,9 @@
-- ProASIC3 Flash family FPGA (130nm CMOS technology) that offers an inherent resistance to |
-- radiation: it is immune to Single Event Latchups for the LHC environment, it has high tolerance|
-- to Total Ionizing Dose effects (>300 Gy) and its configuration memory is not disturbed by SEUs.|
-- Another feature that nanoFIP offers is the possibility to reprogram the user logic through |
-- Another feature that nanoFIP offers is the possibility to reprogram the user logic FPGA through|
-- JTAG interface; WorldFIP frames are translated to the equivalent JTAG signals that drive and |
-- control the user logic Test Access Port (TAP) controller. |
-- monitor the user logic Test Access Port controller (TAP). |
-- nanoFIP is used in conjunction with a FIELDRIVE chip and FIELDTR insulating transformer, |
-- both available from the company ALSTOM. |
-- |
......@@ -112,7 +112,7 @@
-- |
-- o wf_fd_transmitter : for the serialization of produced RP_DAT frames |
-- |
-- o wf_production : for the retreival of bytes for produced RP_DAT frames |
-- o wf_production : for the retrieval of bytes for produced RP_DAT frames |
-- |
-- o wf_engine_control : for the processing of the ID_DAT frames and the coordination of the |
-- wf_consumption, wf_fd_receiver, wf_production & wf_fd_transmitter units|
......@@ -123,8 +123,8 @@
-- o wf_wb_controller : for the handling of the "User Interface WISHBONE Slave" control |
-- signals |
-- |
-- o wf_jtag_controller : for driving and controlling the user logic TAP controller upon |
-- reception of JTAG variables (aa_xy and ab_xy). |
-- o wf_jtag_controller : for driving and monitoring the user logic TAP upon reception of JTAG |
-- variables (aa_xy and ab_xy). |
-- |
-- _____________ ____________________________________________________ |
-- | | | wf_WB_controller | |
......
......@@ -173,7 +173,7 @@ begin
---------------------------------------------------------------------------------------------------
-- Memory mode Consumed & Consumed Broadcast RAM --
-- Storage (by the unit) & retreival (by the user) of consumed bytes --
-- Storage (by the unit) & retrieval (by the user) of consumed bytes --
---------------------------------------------------------------------------------------------------
-- Instantiation of a 512 x 8 Dual Port RAM, for both the consumed and consumed broadcast vars
-- Port A is connected to the WISHBONE interface for the readings from the user
......@@ -195,12 +195,12 @@ begin
---------------------------------------------------------------------------------------------------
-- JTAG Consumed RAM --
-- Storage (by this unit) & retreival (by the JTAG_controller unit) of consumed bytes --
-- Storage (by this unit) & retrieval (by the JTAG_controller unit) of consumed bytes --
---------------------------------------------------------------------------------------------------
-- Instantiation of a 512 x 8 Dual Port RAM for the storage of var_4 variables.
-- Only 127 bytes of memory are used.
-- nanoFIP's user clock uclk is connected to both ports of the memory; the writing of the
-- consumed data and the reading of them (by the wf_jtag_controller) take place internally.
-- Note: only 127 bytes are used.
Consumption_JTAG_RAM : wf_dualram_512x8_clka_rd_clkb_wr
port map(
......
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......@@ -27,6 +27,7 @@
-- 2/2011 v0.04 EG function for manch_encoder; cleaning up of constants+generics |
-- added CTRL bytes for RP_DAT_MSG and RP_DAT_RQ and RP_DAT_RQ_MSG |
-- 2/2011 v0.05 EG JTAG variables added |
-- 11/2011 v0.06 EG c_SESSION_TIMEOUT_C_LGTH, c_JTAG_TIMEOUT_C_LGTH added |
---------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------
......@@ -68,6 +69,68 @@ package wf_package is
constant c_QUARTZ_PERIOD : real := 25.0;
---------------------------------------------------------------------------------------------------
-- Constants regarding the JTAG controller --
---------------------------------------------------------------------------------------------------
constant c_MAX_FRAME_BITS : natural := 976; -- maximum number of TMS/ TDI bits that can be sent
-- in one frame : 122 bytes * 8 bits
constant c_FOUR_JC_TCK_C_LGTH : natural := 5; -- length of a counter counting 4 JC_TCK periods;
-- the JC_TCK frequency is defined by this constant.
-- ex: 5 MHz JC_TCK period = 200 ns = 4 uclk periods,
-- 4 JC_TCK periods = 16 uclk, hence 5 bits counter.
-- Use c_FOUR_JC_TCK_C_LGTH = 6 for a 2.5 MHz JC_TCK,
-- c_FOUR_JC_TCK_C_LGTH = 7 for 1.25 MHz etc.
-- check also the c_JC_TIMEOUT_C_LGTH in the following paragraph
---------------------------------------------------------------------------------------------------
-- Constant regarding the session timeout counters --
---------------------------------------------------------------------------------------------------
-- To add a robust layer of protection to the FSMs of the desing, counters that depend only on
-- the system clock have being implemented; when they are filled up, they can bring the FSMs back
-- to the IDLE state.
-- For the wf_rx_deserializer, at the slowest bit rate, 31.25 kbps, the reception of the longest
-- frame should not last more than:
-- 133 bytes RP_DAT = 34048 us
-- This demands for a 21 bits counter.
-- Similarly, for the wf_tx_serializer, at the slowest bit rate, 31.25 kbps, the transmission of
-- the longest frame should not last more than:
-- 133 bytes RP_DAT = 34048 us
-- This demands for a 21 bits counter.
-- For the wf_engine_control, at the slowest bit rate, 31.25 kbps, the reception of an ID_DAT frame
-- followed by the reception/ transmission of an RP_DAT should not last more than:
-- 8 bytes ID_DAT = 2048 us
-- silence time = 4096 us
-- 133 bytes RP_DAT = 34048 us
-- ------------
-- 40192 us
-- This also demands for a 21 bits counter.
-- Therefore the same length of the timeout counters can be used for the FSMs of the wf_rx_deserializer,
-- wf_tx_serializer and wf_engine_control. The FSMs will be reset if 52 ms (complete 21 bit counter)
-- have passed since they have left the IDLE state.
constant c_SESSION_TIMEOUT_C_LGTH : natural := 21;
-- For the wf_jtag_controller FSM this timeout depends on the frequency of the JC_TCK.
-- The time the FSM needs to handle the biggest frame (122 bytes) is:
-- 122 * ((4 * JC_TCK_period) + 2 uclk_period)
-- For a 5 MHz JC_TCK this is 103.7 us and demands for a counter of 13 bits.
-- Use c_JC_TIMEOUT_C_LGTH = 13 also for a 2.5 MHz JC_TCK,
-- c_JC_TIMEOUT_C_LGTH = 14 for 1.25 MHz etc.
constant c_JC_TIMEOUT_C_LGTH : natural := 13;
---------------------------------------------------------------------------------------------------
-- Constant regarding the deglitch filter --
---------------------------------------------------------------------------------------------------
......@@ -135,20 +198,6 @@ package wf_package is
---------------------------------------------------------------------------------------------------
-- Constant regarding the JTAG controller --
---------------------------------------------------------------------------------------------------
constant c_MAX_FRAME_BITS : natural := 976; -- maximum number of TMS/ TDI bits that can be sent
-- in one frame : 122 bytes * 8 bits
constant c_FOUR_JC_TCK_C_LGTH : integer := 5; -- length of a counter counting 4 JC_TCK periods;
-- the JC_TCK frequency is defined by this constant.
-- ex: 5 MHz JC_TCK period = 200 ns = 4 uclk periods,
-- 4 JC_TCK periods = 16 uclk, hence 5 bits counter.
-- Use c_FOUR_JC_TCK_C_LGTH = 6 for a 2.5 MHz JC_TCK,
-- c_FOUR_JC_TCK_C_LGTH = 7 for 1.25 MHz etc.
---------------------------------------------------------------------------------------------------
-- Constant regarding the Model & Constructor decoding --
---------------------------------------------------------------------------------------------------
......
......@@ -15,7 +15,7 @@
-- Description After an ID_DAT frame requesting for a variable to be produced, the unit provides |
-- to the wf_tx_serializer unit one by one, all the bytes of data needed for the |
-- RP_DAT frame (apart from the FSS, FCS and FES bytes). The coordination of the |
-- retreival is done through the wf_engine_control and the signal byte_index_i. |
-- retrieval is done through the wf_engine_control and the signal byte_index_i. |
-- |
-- General structure of a produced RP_DAT frame: |
-- ___________ ______ _______ ______ _________________ _______ _______ ___________ _______ |
......@@ -214,12 +214,12 @@ begin
---------------------------------------------------------------------------------------------------
-- Memory mode Produced RAM --
-- Storage (by the user) & retreival (by the unit) of produced bytes --
-- Storage (by the user) & retrieval (by the unit) of produced bytes --
---------------------------------------------------------------------------------------------------
-- Instantiation of a 512 x 8 Produced Dual Port RAM.
-- Only 124 bytes of memory are used.
-- Port A is used by the nanoFIP for the readings from the Produced RAM;
-- Port B is connected to the WISHBONE interface for the writings from the user.
-- Note: only 124 bytes are used.
Produced_Bytes_From_RAM: wf_dualram_512x8_clka_rd_clkb_wr
port map(
......@@ -236,7 +236,7 @@ begin
---------------------------------------------------------------------------------------------------
-- Slone mode DAT_I bus Sampling --
-- Retreival of the two bytes to be produced --
-- retrieval of the two bytes to be produced --
---------------------------------------------------------------------------------------------------
-- Sampling of the input data bus DAT_I(15:0) for the operation in stand-alone mode.
-- The sampling takes place on the 1st clock cycle after the VAR3_RDY has been de-asserted.
......@@ -329,7 +329,7 @@ begin
-- In memory mode:
if slone_i = '0' then
-- retreival of base address info for the memory from the wf_package
-- retrieval of base address info for the memory from the wf_package
s_base_addr <= c_VARS_ARRAY(c_VAR_3_INDEX).base_addr;
......
......@@ -138,13 +138,13 @@ begin
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -
when var_presence =>
-- data length information retreival from the c_VARS_ARRAY matrix (wf_package)
-- data length information retrieval from the c_VARS_ARRAY matrix (wf_package)
s_prod_data_lgth <= c_VARS_ARRAY(c_VAR_PRESENCE_INDEX).array_lgth;
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -
when var_identif =>
-- data length information retreival from the c_VARS_ARRAY matrix (wf_package)
-- data length information retrieval from the c_VARS_ARRAY matrix (wf_package)
s_prod_data_lgth <= c_VARS_ARRAY(c_VAR_IDENTIF_INDEX).array_lgth;
......@@ -188,7 +188,7 @@ begin
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -
when var_5 =>
-- data length information retreival from the c_VARS_ARRAY matrix (wf_package)
-- data length information retrieval from the c_VARS_ARRAY matrix (wf_package)
s_prod_data_lgth <= c_VARS_ARRAY(c_VAR_5_INDEX).array_lgth;
......
......@@ -152,7 +152,7 @@ entity wf_production is port(
-- nanoFIP User Interface, NON-WISHBONE
slone_data_i : in std_logic_vector (15 downto 0);
-- used by: wf_prod_bytes_retriever for the bytes retreival in stand-alone mode
-- used by: wf_prod_bytes_retriever for the bytes retrieval in stand-alone mode
var1_acc_a_i : in std_logic;
var2_acc_a_i : in std_logic;
......@@ -171,7 +171,7 @@ entity wf_production is port(
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-- Signals from the wf_jtag_controller unit
jc_tdo_byte_i : in std_logic_vector (7 downto 0);
-- used by: wf_prod_bytes_retriever for the bytes retreival of a var_5
-- used by: wf_prod_bytes_retriever for the bytes retrieval of a var_5
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
......@@ -253,7 +253,7 @@ begin
---------------------------------------------------------------------------------------------------
-- Bytes Retreival --
-- Bytes retrieval --
---------------------------------------------------------------------------------------------------
-- Instantiation of the wf_prod_bytes_retriever unit
......
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......@@ -121,7 +121,7 @@ begin
---------------------------------------------------------------------------------------------------
-- Deglitching --
-- Deglitching --
---------------------------------------------------------------------------------------------------
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -
......
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......@@ -90,6 +90,8 @@
-- var_i added for the jtag_var1 treatment; |
-- r_fcser, r_tler_o considered only for a cons variable (bf a wrong |
-- crc on an id-dat could give r_fcser) |
-- 11/2011 v0.042 EG the var3_acc_a_i and not the s_var3_acc_synch(3) was used for |
-- the refreshment:s |
---------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------
......@@ -253,7 +255,7 @@ begin
if rst_status_bytes_p_i = '1' then -- bit reinitialized after a production
s_refreshment <= '0';
elsif var3_acc_a_i = '1' then -- indication that the memory has been accessed
elsif s_var3_acc_synch(2) = '1' then -- indication that the memory has been accessed
s_refreshment <= '1';
end if;
......
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