JTAG_contoller: added a counter for the bits that are being played to avoid…

JTAG_contoller: added a counter for the bits that are being played to avoid complicated combinatorial calculations git-svn-id: http://svn.ohwr.org/cern-fip/trunk/hdl/design@231 7f0067c9-7624-46c7-bd39-3fb5400c0213

JTAG_contoller: added a counter for the bits that are being played to avoid…
JTAG_contoller: added a counter for the bits that are being played to avoid complicated combinatorial calculations git-svn-id: http://svn.ohwr.org/cern-fip/trunk/hdl/design@231 7f0067c9-7624-46c7-bd39-3fb5400c0213
a1350268 · egousiou · e91158c9 · a1350268 · a1350268 · a1350268
Commit a1350268 authored Sep 07, 2011 by egousiou
6 changed files
--- a/DualClkRAM.vhd
+++ b/DualClkRAM.vhd
@@ -53,9 +53,9 @@
 library IEEE;
 use IEEE.STD_LOGIC_1164.all; -- std_logic definitions
 use IEEE.NUMERIC_STD.all;    -- conversion functions
-- Specific library
-library work;
-use work.WF_PACKAGE.all;     -- definitions of types, constants, entities
+-- Component specific library
+library PROASIC3;            -- ProASIC3 library
+use PROASIC3.all;


 --=================================================================================================

--- a/nanofip.vhd
+++ b/nanofip.vhd
--- a/wf_DualClkRAM_clka_rd_clkb_wr.vhd
+++ b/wf_DualClkRAM_clka_rd_clkb_wr.vhd
--- a/wf_jtag_controller.vhd
+++ b/wf_jtag_controller.vhd
--- a/wf_jtag_player.vhd
+++ b/wf_jtag_player.vhd
--- a/wf_package.vhd
+++ b/wf_package.vhd
@@ -137,13 +137,15 @@ package WF_package is
  constant c_MAX_FRAME_BITS : natural := 976; -- maximum number of TMS/ TDI bits that can be sent in
                                              -- one frame : 122 bytes * 8 bits

-  constant c_JC_TCK_DIV : unsigned (3 downto 0) := "1000"; -- JC_TCK is created by a frequency
+                                                           -- JC_TCK is created by a frequency
                                                           -- division of the 40 MHz uclk.
                                                           -- c_JC_TCK_div = 8 gives a JC_TCK of 5 MHz

  constant c_FOUR_JC_TCK_C_LGTH : integer       := 5;      -- length of a counter
                                                           -- counting 4 JC_TCK periods

+
+
 ---------------------------------------------------------------------------------------------------
 --                        Constant regarding the Model & Constructor decoding                    --
 ---------------------------------------------------------------------------------------------------
@@ -890,6 +892,7 @@ end component WF_rx_osc;
    dat_o        : out std_logic_vector (15 downto 0);
    jc_tms_o     : out std_logic;
    jc_tdi_o     : out std_logic;
+  TP39 : out std_logic;
    jc_tck_o     : out std_logic);
  -----------------------------------------------------------------
  end component nanofip;