2 differential GTP pairs of the FPGA are linked to the Castellated edge
contact. SI can be fulfilled by solder the Mini-WR to the carrier board.
Special PCB cut-out should be implemented on the carrier board due to
the R/C on the bottom of the Mini-WR.
GMII signal group, UART, SFP control signals and few debug IO are
available for this option.
Mezzostak - High speed self mating board-2-board
(10106813-063112LF by default) from Amphenol FCI are applied on Mini-WR.
Stack height from 3mm to 7mm with 0.5mm step can be adjusted by choosing
Another 2 GTP differential paris of the FPGA are linked to the Mezzostak
connector, and flyby further to the gold-finger connector.
When use the Mezzostak connector, the additional trace on Mini-WR-G to
the gold-finger acts as branch. Although our test shows that the signal
can suffer the small branch, it is still not recommended to choose
Mini-WR-G when the Mezzostak connector is used.
The 60Pos. Mezzostak connector also provides signals for GMII, UART and
Gold-finger connector on Mini-WR-G
The signals connected to 40Pos. Gold-finger are subset of those on the
Mezzostak connector, without JTAG, UART and few data signals of the
GMII. The Mezzostak is in the trace path and cause no interference.
When use the gold-finger, 3 types of MEC1 series
can be used.
|MEC1-120-02-L-D-A| Vertical |
|MEC1-120-02-L-D-RA1-SL| Right Angle|
|MEC1-120-02-L-D-EM2| Edge mount|
Suffix is needed to specify the detailed connect options as shown