WR NIC bitstream is now built from HDL sources using HDLMake

822f6fd3 · Javier D. Garcia-Lasheras · ea284ab5 · 822f6fd3 · 822f6fd3
Commit 822f6fd3 authored Jul 20, 2016 by Javier D. Garcia-Lasheras
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Showing with 31 additions and 12 deletions

top-manifest.patch recipes-software/nic-bitstream/files/top-manifest.patch +8 -0

nic-bitstream_0.1.bb recipes-software/nic-bitstream/nic-bitstream_0.1.bb +23 -12

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--- a/recipes-software/nic-bitstream/files/top-manifest.patch
+++ b/recipes-software/nic-bitstream/files/top-manifest.patch
+
+diff -Naur a/syn/specdio/Manifest.py b/syn/specdio/Manifest.py
+--- a/syn/specdio/Manifest.py    2016-07-20 04:17:52.657700773 +0100
+++ b/syn/specdio/Manifest.py    2016-07-20 04:19:26.030800405 +0100
+@@ -9,1 +9,3 @@
+ syn_project = "wr_nic_dio.xise"
+syn_tool = "ise"
+top_module = "wr_nic_dio_top"
--- a/recipes-software/nic-bitstream/nic-bitstream_0.1.bb
+++ b/recipes-software/nic-bitstream/nic-bitstream_0.1.bb
-SUMMARY = "Provides wr_nic_dio.bin bitstream for wr-nic over spec"
+SUMMARY = "Provides the FPGA bitstream for White Rabbit Network Interface Card on SPEC"

 LICENSE = "GPL-2.0"
 LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/GPL-2.0;md5=801f80980d171dd6425610833a22dbe6"

-inherit module
-
-PR = "r0"
+PR = "r1"
 PV = "0.1"

+# Patch the top Manifest.py to adapt the old WR-NIC repo to the new HDLMake format.
+SRC_URI = "git://ohwr.org/white-rabbit/wr-nic.git \
+           file://top-manifest.patch"
+
+SRCREV = "3bf04881479303ae41ce3fd2f4df90cd22ea8991"

-SRC_URI = "http://www.ohwr.org/attachments/download/2687/wr_nic_dio.bin-2014-02-14"
-SRC_URI[md5sum] = "371f22659e5acf8612e7e11c1481abf6"
+S = "${WORKDIR}/git"
+
+# Update and init Git submodules to clone some dependent HDL libraries
+do_fetch_extra(){
+    git submodule update --init
+}
+addtask fetch_extra after do_unpack before do_patch

-S = "${WORKDIR}/"

 FILES_${PN} += "/lib/firmware/fmc"

+
+# Get into the HDL synthesis folder and run HDLMake to analyze the design and generate the Makefile.
+# Once the design is cloned, we can run make to build the FPGA bitstream.
 do_compile() {
-    :
+    cd ${S}/syn/specdio/
+    hdlmake
+    make
 }

+
+# Install the bitstream binary in the folder where the associated kernel module will search for it.
 do_install() {
             install -d ${D}/lib/firmware/fmc
-             install -m 0755 ${S}/wr_nic_dio.bin-2014-02-14 ${D}/lib/firmware/fmc/wr_nic_dio.bin
+             install -m 0755 ${S}/syn/specdio/wr_nic_dio_top.bin ${D}/lib/firmware/fmc/wr_nic_dio.bin
 }


-
-# The inherit of module.bbclass will automatically name module packages with
-# "kernel-module-" prefix as required by the oe-core build environment.