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MasterFIP - Testing
Commit 0000fe0b authored by Marek Gumiński's avatar Marek Gumiński
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Removed unused python code. 

Stopped inserting adc modules
parent 59a42e2c
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Showing with 16 additions and 222 deletions
pts/fmcmasterfip.sh
View file @ 0000fe0b
......@@ -84,8 +84,8 @@ sleep 1
insmod "${top}/${projectpath}/software/fmc-bus/kernel/fmc.ko"
insmod "${top}/${projectpath}/software/spec-sw/kernel/spec.ko" "fw_name=../../${top}/${projectpath}/gateware/spec-init.bin-2012-12-14"
insmod "${top}/${projectpath}/software/zio/zio.ko"
insmod "${top}/${projectpath}/software/fmc-adc-100m14b4cha-sw/kernel/fmc-adc-100m14b.ko" "gateware=../../${top}/${projectpath}/gateware/syn/spec/spec_top_fmc_masterfip.bin"
# insmod "${top}/${projectpath}/software/zio/zio.ko"
# insmod "${top}/${projectpath}/software/fmc-adc-100m14b4cha-sw/kernel/fmc-adc-100m14b.ko" "gateware=../../${top}/${projectpath}/gateware/syn/spec/spec_top_fmc_masterfip.bin"
modprobe usbserial
insmod "${top}/${projectpath}/software/cp210x/cp210x.ko"
......
python/fmcmasterfip.py
View file @ 0000fe0b
......@@ -104,9 +104,15 @@ class fmcmasterfip:
###################### module initialization ####################
###################################################################
self.carrier = carrier;
self.firmware = topdirpath + firmware;
self.firmware = firmware;
self.topdirpath = topdirpath;
###################################################################
###################### firmware update ####################
###################################################################
self.load_firmware( )
###################################################################
#################### interfaces initialization ####################
###################################################################
......@@ -115,7 +121,6 @@ class fmcmasterfip:
self.carr_onewire = ow.COpenCoresOneWire(self.carrier, self.CARR_ONEWIRE_ADDR, 199, 39) #for 40 MHz clock
self.carr_ds18b20 = ds18b20.CDS18B20(self.carr_onewire, 0)
self.adc_spi = ospi.COpenCoresSPI(self.carrier, self.MASTERFIP_SPI_ADC, 15)
self.fmc_onewire = ow.COpenCoresOneWire(self.carrier, self.MASTERFIP_OW_THERM, 499, 99) #for 40 MHz clock
self.fmc_ds18b20 = ds18b20.CDS18B20(self.fmc_onewire, 0)
......@@ -147,8 +152,6 @@ class fmcmasterfip:
# Make sure that serial data output is enabled
self.fipcore.write_regname('test',0)
self.adc_def_conf = adc_conf()
self.busfreq = self.get_bus_freq()
# Returns FMC unique ID
......@@ -171,37 +174,6 @@ class fmcmasterfip:
def sys_i2c_eeprom_read(self, addr, size):
return self.fmc_eeprom_24aa64.rd_data(addr, size)
def adc_init(self):
self.adc_power(1)
self.adc_configure();
def adc_configure(self):
# software reset
# should be done after power up
# self cleaning
self.write_adc_reg_spi( 0, 0x80 )
time.sleep(0.01)
# set up singed data format
self.write_adc_reg_spi( 1, 0x20 )
def adc_single_sample(self):
return numpy.int16( util.u2int16arr( numpy.uint16( [ self.carrier.read(self.MASTERFIP_CSR_ADC+0x38), self.carrier.read(self.MASTERFIP_CSR_ADC+0x4c) ] )))
def read_adc_reg_spi(self, addr ):
# frame format:
# BIT: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# FUNCTION: rd/nwr A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
return self.adc_spi.transaction16(0, 0x8000 | ((addr&0x7f)<<8) )
def write_adc_reg_spi(self, addr, data ):
# frame format:
# BIT: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# FUNCTION: rd/nwr A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
return self.adc_spi.transaction16( 0, ((addr&0x7f)<<8) + (data&0xff) )
def load_firmware(self):
self.carrier.program(self.firmware);
......@@ -210,142 +182,6 @@ class fmcmasterfip:
self.firmware = firmware;
# set up acquisition
def setup_acquisition( self, customconfig = 0 ):
# if customconfig is not specified default will be used
if customconfig == 0:
cfg = self.adc_def_conf
elif isinstance(customconfig, adc_conf):
util.dbg_msg("Using custom config")
cfg = customconfig
else:
util.crit_msg("Incorrect call of setup_acquisition")
# kill acquisition process if for some reason it is already running
for proc in psutil.process_iter():
if proc.name == "fald-acq":
proc.kill()
# if tmp file exist
if os.path.isfile(cfg.output_file):
# remove it
os.remove(cfg.output_file)
# make id use form understandable by driver
idstr = "0x%x" % (self.carrier.bus << 8)
util.info_msg("Setting up acquisition on carrier connected to bus %s" % idstr )
call = [self.topdirpath + util.faldacq_path,
"-b", str(cfg.samples_before),
"-a", str(cfg.samples_after),
"-u", str(cfg.undersampling),
"-c", str(cfg.trigger_channel),
"-t", str(cfg.trigger_threshold),
"-r", "10",
"-B", cfg.output_file,
idstr ]
util.info_msg("Starting acquisition with following call:")
util.info_msg("\t%s\n" % ' '.join(call) )
# start new acquisition
proc = subprocess.Popen( call,
stderr=subprocess.PIPE,
stdout=subprocess.PIPE
)
time.sleep(1)
return proc
def customize_adc_settings(self, transmission_bytes, samplesperbit=20, margin=1.2):
oversampling=int(self.adc_sampling_freq/self.busfreq)
undersampling=float(oversampling)/float(samplesperbit)
util.dbg_msg("Initial undersampling: %f" % undersampling )
# in order to keep the same number of samples for all bus speeds
# samples per bit must be limited to maximum value achievable for fastest bus
if undersampling > 1:
samples = transmission_bytes*8*samplesperbit*margin
undersampling = int(undersampling)
else :
util.crit_msg("Wrong samples per bit value selected. Can't set such value! Following subtests would fail!" )
util.dbg_msg("Undersampling: %d, samples %d" % ( undersampling, samples ) )
custom_conf = adc_conf()
custom_conf.undersampling = undersampling;
custom_conf.samples_after = int( samples )
return custom_conf
def save_sampling_freq( self, freq ):
# modify standard binary output file to store inforation about sampling frequency
try:
with open( self.adc_def_conf.output_file, "r+b") as fin:
fin.seek( self.SAMPLING_FREQ_ADDR_IN_BINARY_DATA)
fin.write(freq)
fin.close()
except EnvironmentError: # parent of IOError, OSError *and* WindowsError where available
util.info_msg('File containing ADC samples not found')
def read_adc_samples( self ):
try:
with open( self.adc_def_conf.output_file, "rb") as fin:
# header
header=fin.read(512)
# get number of samples
nsamples = struct.unpack("I",header[8:12])
# unpack gives structure
# integer (that is interesting) is stored in address 0
# number of samples must be divided by number of channels
nsamples = nsamples[0]/4
# in order to know timescale i had to add information about sampling frequency to binary file
# it is stred in uint32_t reserverd on byte 76
sampling_freq = struct.unpack("I",header[ self.SAMPLING_FREQ_ADDR_IN_BINARY_DATA : self.SAMPLING_FREQ_ADDR_IN_BINARY_DATA+4 ] )
if ( sampling_freq[0] == 0):
util.info_msg( "Sampling frequency is not stored in given file." )
sampling_period = 1
else:
sampling_period = 1e6 / sampling_freq[0];
# read data from file
d=numpy.fromfile(file=fin,dtype=numpy.uint16).reshape(nsamples,4)
# helper vector
samples_range=range(0,nsamples-1)
# positive line is connected to ADC channel 0
positive_samples = numpy.int16( util.u2int16arr( numpy.uint16( d[samples_range, 0] ) ) )
# negative line is connected to ADC channel 1
negative_samples = numpy.int16( util.u2int16arr( numpy.uint16( d[samples_range, 1] ) ) )
transmission = numpy.int32( numpy.int32(positive_samples) - numpy.int32(negative_samples) );
time = numpy.linspace(0, sampling_period*len(transmission),len(transmission))
return [transmission, positive_samples, negative_samples, time ]
except EnvironmentError: # parent of IOError, OSError *and* WindowsError where available
util.info_msg('File containing ADC samples not found')
return [ -1, -1, -1, -1]
def save_transmission(self, path ):
if os.path.exists(self.adc_def_conf.output_file) :
shutil.move(self.adc_def_conf.output_file, path+".bin" )
if os.path.exists(self.adc_def_conf.output_img) :
shutil.move(self.adc_def_conf.output_img, path+".png" )
###############################################################################################
......@@ -366,13 +202,6 @@ class fmcmasterfip:
util.crit_msg("System PLL NOT locked");
if ( self.carrier_csr.read_regname("stat.ddr3_cal_done") ):
util.info_msg("DDR3 calibration done");
else:
util.crit_msg("DDR3 calibration NOT done");
# Read bitstream type
def verify_bitstream_type(self):
......@@ -425,35 +254,7 @@ class fmcmasterfip:
print self.fipcore.read_regname('speed')
return self.freq_options[ self.fipcore.read_regname('speed') ]
def adc_power(self, val):
# all power switches are enabled by low value
val = 0 if val > 0 else 1;
self.fipcore.write_regname('adc.1v8_shdn_n', val)
self.fipcore.write_regname('adc.m5v_shdn_n', val)
self.fipcore.write_regname('adc.5v_en', val)
def close_relay(self, val):
if val == 0 :
self.fipcore.write_regname('adc.prim_conn', 0)
self.fipcore.write_regname('adc.sec_conn', 0)
elif val == 1 :
self.fipcore.write_regname('adc.prim_conn', 1)
self.fipcore.write_regname('adc.sec_conn', 0)
elif val == 2 :
self.fipcore.write_regname('adc.prim_conn', 0)
self.fipcore.write_regname('adc.sec_conn', 1)
else:
util.dbg_msg("Wrong identifier" )
return -1
return 0
# Disable EXT_SYNC test pulse
# Disable EXT_SYNC test pulse
def disable_ext_sync_tst(self):
self.fipcore.write_regname('ext_sync', 0)
......@@ -477,10 +278,3 @@ class fmcmasterfip:
rx_data_reg3 = self.fipcore.read_regname('rx_data_reg3')
rx_data = rx_data_reg3 << 32*2 | rx_data_reg2 << 32*1 | rx_data_reg1 << 32*0
return [ rx_stat, rx_data_ctrl, rx_data ]
# all_bytes = (rx_stat << 32*4) | (rx_data_ctrl << 32*3) | (rx_data_reg1 << 32*2) | (rx_data_reg2 << 32) | (rx_data_reg3)
# print ("bytes stat : 0x%08X")%(rx_stat)
# print ("byte ctrl : 0x%08X")%(rx_data_ctrl)
# print ("bytes 0-3 : 0x%08X")%(rx_data_reg1)
# print ("bytes 4-7 : 0x%08X")%(rx_data_reg2)
# print ("bytes 8-11 : 0x%08X")%(rx_data_reg3)
python/spec.py
View file @ 0000fe0b
......@@ -42,10 +42,10 @@ class spec:
def program( self, firmware ):
self.firmware = firmware;
firmware_path = self.cwd + self.firmware
firmware_path = self.projdir + self.firmware
util.info_msg( "Firmware loading from %s "% firmware_path )
os.system("ls -l %s" % firmware_path)
# os.system("ls -l %s" % firmware_path)
if( self.speclib.spec_load_bitstream(c_void_p( self.card ), c_char_p( firmware_path ) ) == 0 ):
util.err_msg( "Firmware loader failure" )
return -1
......
python/utilities.py
View file @ 0000fe0b
......@@ -13,7 +13,7 @@ INFO = True
WARRNING = True
CRITICAL = True
FIRMWARE_PATH ='/gateware/syn/spec/spec_top_fmc_masterfip.bin'
FIRMWARE_PATH ='gateware/syn/spec/spec_top_fmc_masterfip.bin'
TOPDIRNAME ="fmcmasterfip"
test03_outputpath ='/tmp/'
......@@ -61,7 +61,7 @@ def find_prj_topdir(topdirname):
[ tmppath, dirname ] = os.path.split( os.getcwd() );
while( tmppath != '/' ):
if dirname == topdirname:
return os.path.join( tmppath, dirname)
return os.path.join( tmppath, dirname)+"/"
[ tmppath, dirname ] = os.path.split(tmppath);
crit_msg("Top directory path not found\nPlease make sure that top directory of PtsFmcMastrefip is called \"fmcmasterfip\"")
......
scripts/drivers_load.sh
View file @ 0000fe0b
......@@ -58,8 +58,8 @@ echo "Identified $top as FMC masterFip top directory"
insmod "${top}/${projectpath}/software/fmc-bus/kernel/fmc.ko"
insmod "${top}/${projectpath}/software/spec-sw/kernel/spec.ko" "fw_name=../../${top}/${projectpath}/gateware/spec-init.bin-2012-12-14"
insmod "${top}/${projectpath}/software/zio/zio.ko"
insmod "${top}/${projectpath}/software/fmc-adc-100m14b4cha-sw/kernel/fmc-adc-100m14b.ko" "gateware=../../${top}/${projectpath}/gateware/syn/spec/spec_top_fmc_masterfip.bin"
# insmod "${top}/${projectpath}/software/zio/zio.ko"
# insmod "${top}/${projectpath}/software/fmc-adc-100m14b4cha-sw/kernel/fmc-adc-100m14b.ko" "gateware=../../${top}/${projectpath}/gateware/syn/spec/spec_top_fmc_masterfip.bin"
modprobe usbserial
insmod "${top}/${projectpath}/software/cp210x/cp210x.ko"
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