In the second version of the HiCCE-FMC-128 module, digital resistors used in the first prototype module to control the upper and lower limit of the bandpass filter on the Intan RHA2132 frontend chips were removed. The bandwidth was fixed to 1.0 Hz – 20 kHz.
We tested HiCCE-FMC-128 version 2 using a commercial low-cost FMC carrier based on a modern hybrid Zynq-7000 SoC device that integrates an FPGA fabric along with a dual-core 32-bits processor (ARM Cortex).
First revision to the board.
The issues that arose during discussion of the first board are:
do we have enough real estate? will it be enough to delete the
jumpers or we need to enlarge the board beyond the spec?
as configured we can neither electroplate nor measure impedance.
Some proposals on the table.
Configure the board permanently for impedance measurement and
delete all electroplating circuitry.
Make the board larger to accommodate extra signals.
Consider replacing the connectors with a high-density analog
connector suited to attach a connector daughterboard or headstage.
Add a connector with digital I/O for sync to behavioral rigs etc.