/*
 * FPGA_CommBlock_v1.h
 *
 *  Created on: Sep 8, 2018
 *      Author: Kasun
 */

#ifndef SRC_FPGA_COMMBLOCK_V1_H_
#define SRC_FPGA_COMMBLOCK_V1_H_

#define FPGA_COMMBLOCK_DEBUG	0

#include "xparameters.h"
#include "xil_io.h"

#define MEM_BASE_ADDR					(XPAR_PS7_DDR_0_S_AXI_BASEADDR + 0x10000000)
#define DMA_F2A_BUFFER_BASE				(MEM_BASE_ADDR + 0x00300000)
#define fifo_stream_F2A_base_addr		(DMA_F2A_BUFFER_BASE)

#define reg_block_base_addr				XPAR_REG_BLOCK_0_S00_AXI_BASEADDR

#define FPGA_FIFO_SIZE_WORDS			1024*32
#define FPGA_FIFO_SIZE_BYTES			FPGA_FIFO_SIZE_WORDS*4

void Write_registers(unsigned int* addr, unsigned int* val, unsigned int size);

unsigned int Read_FIFO_Stream(unsigned int* addr, unsigned int* val, unsigned int size);


#endif /* SRC_FPGA_COMMBLOCK_V1_H_ */
