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Opened Jun 01, 2016 by Nicolas Chevillot@chevillotn
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Relations missing for VHDL package to be used in system verilog

In case of mixed-language simulation, a VHDL file defining a package (library test, package this_package) generates the following relation: Provide package test.this_package

If we want to use this package from SystemVerilog file, we need to use the following import:
import this_package::*;
and compile the SystemVerilog file using -L test to include the test library.

However the Verilog parser in this case will generate the following relation: Use package this_package

Therefore the dependency is not found.

The VHDL parser should in case of defining a package add the followinfg 2 relations:
Provide package test.this_package
Provide package this_package

so the dependency will be fulfilled

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Reference: project/hdl-make#20