Programming languages used in this repository

  •   Python
    92.08 %
  •   VHDL
    4.16 %
  •   Verilog
    2.77 %
  •   Makefile
    0.41 %
  •   Tcl
    0.4 %
  •   SystemVerilog
    0.09 %
  •   Stata
    0.06 %
  •   Coq
    0.02 %

Commit statistics for 921fc7b5bc0605ee2186718ddd390095c2fa0140 Jan 12 - Oct 04

  • Total: 1244 commits
  • Average per day: 0.4 commits
  • Authors: 24

Commits per day of month

Commits per weekday

Commits per day hour (UTC)