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Hdlmake
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Hdlmake
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75dbfdde359ba138b8487c9bac8dcf27568ee1ad
Switch branch/tag
hdl-make
tests
counter
testbench
30 Mar, 2019
1 commit
Fix and upgrade the counter test demo HDL files
· c97cff89
Javier D. Garcia-Lasheras
authored
Mar 30, 2019
c97cff89
10 Mar, 2017
2 commits
Use generics in VHDL counter test to select sim and syn dividers
· 03047436
Javier D. Garcia-Lasheras
authored
Mar 10, 2017
03047436
Update Verilog counter test: counter + shifter
· feff4994
Javier D. Garcia-Lasheras
authored
Mar 10, 2017
feff4994
16 Sep, 2014
1 commit
Simple 8-bit counter test for syn/sim, VHDL/Verilog
· cc56877a
garcialasheras
authored
Sep 16, 2014
cc56877a