Commits · 305021db974be1f8bf9779b77f025291107bf1ef · Projects / Hdlmake

11 Jun, 2013 14 commits
- .gitattributes: fix binary filter · 305021db
  Lucas Russo authored Nov 13, 2012
  
  305021db
- various: small cleanup · c2f8dff6
  Lucas Russo authored Nov 13, 2012
  
  c2f8dff6
- various: small fixes · 2d608ee0
  Lucas Russo authored Nov 07, 2012
  
  2d608ee0
- .gitattributes: fix binary name · e22b040b
  Lucas Russo authored Nov 07, 2012
  
  e22b040b
- .gitignore: add .orig files · a0ec5609
  Lucas Russo authored Nov 07, 2012
  
  a0ec5609
- fix wrong commit files · a6a21470
  Lucas Russo authored Nov 06, 2012
  
  a6a21470
- add upstream history and branches · 6acbfc72
  Lucas Russo authored Oct 30, 2012
```
This commit introduces all history from the original
hdlmake project, including its current branches
```
  6acbfc72
- Updated list of supported FPGA chips · d23642f1
  Adrian Byszuk authored Oct 25, 2012
  
  d23642f1
- doc/*: new documentation files · cb38e703
  Lucas Russo authored Oct 16, 2012
  
  cb38e703
- .gitignore: add ignore files · e2a98418
  Lucas Russo authored Oct 16, 2012
  
  e2a98418
- hdlmake2: update binary · 9a3bc535
  Lucas Russo authored Oct 10, 2012
  
  9a3bc535
- flow.py: fix ise standard lib typo · ef8d51e3
  Lucas Russo authored Oct 10, 2012
  
  ef8d51e3
- src/makefile_writer.py: Include placeholder file for incremental make dependency · 30323700
  Lucas Russo authored Oct 08, 2012
  
  30323700
- generate_modelsim_makefile call: fix name calling throughout the program · 0e311010
  Lucas Russo authored Sep 29, 2012
  
  0e311010
06 Jun, 2013 1 commit
- mostly convention changes · 78683b7e
  Paweł Szostek authored Jun 06, 2013
  
  78683b7e
03 Jun, 2013 1 commit
- iverilog support with specific additional options · 3973abf6
  Vamsi Vytla authored Jun 03, 2013
  
  3973abf6
02 Jun, 2013 1 commit
- Merge branch 'master' of ohwr.org:misc/hdl-make · f7ca1122
  Paweł Szostek authored Jun 02, 2013
```
Conflicts:
	hdlmake
```
  f7ca1122
24 May, 2013 1 commit
- Added Verilog support for 'vm' file extension (netlis generated by Synplify). · aceb7036
  Adrian Fiergolski authored May 24, 2013
  
  aceb7036
21 May, 2013 7 commits
- fix a bug in modelsim.ini parsing · 2fa2573f
  Wesley W. Terpstra authored May 21, 2013
  
  2fa2573f
- regenerate hdlmake · 2eed4548
  Wesley W. Terpstra authored May 21, 2013
  
  2eed4548
- add quartus project as action · d928ba3a
  Wesley W. Terpstra authored May 21, 2013
  
  d928ba3a
- fix bug preventing automatic flow from running · 075b9893
  Wesley W. Terpstra authored May 21, 2013
  
  075b9893
- add support for QIP files · 34d1e2a3
  Wesley W. Terpstra authored May 21, 2013
  
  34d1e2a3
- fix altera megacores under modelsim · f28a6bf6
  Wesley W. Terpstra authored May 21, 2013
  
  f28a6bf6
- fix someone's bad merge (try testing?!) · e09711eb
  Wesley W. Terpstra authored May 21, 2013
  
  e09711eb
05 May, 2013 15 commits
- Remove permanently Hdlmake executable from the repository · aff4c49c
  Paweł Szostek authored May 05, 2013
  
  aff4c49c
- Makefile: add release generation · fbfab7c7
  Pawel Szostek authored May 04, 2013
```
Conflicts:
	Makefile
```
  fbfab7c7
- merge-cores option: append a notice saying that the file is automatically generated · 349d03a1
  Tomasz Wlostowski authored Mar 08, 2013
  
  349d03a1
- makefile fix · 341efef6
  Tomasz Wlostowski authored Feb 22, 2013
  
  341efef6
- added missing verilog preprocessor files · 8b1bc22d
  Tomasz Wlostowski authored Feb 22, 2013
  
  8b1bc22d
- copy NGC files when merging VHDL/Verilog sources · ec9adcc7
  Tomasz Wlostowski authored Jan 23, 2013
  
  ec9adcc7
- updated binary · 4d855c6c
  Tomasz Wlostowski authored Jan 23, 2013
  
  4d855c6c
- merge-cores option: puts together all files of a project into a single… · 86e35ce7
  Tomasz Wlostowski authored Jan 23, 2013
```
merge-cores option: puts together all files of a project into a single 'archive'. For convenience of Windows users :)
```
  86e35ce7
- Ultimate no-modelsim-bug solution · 7c1b2f93
  Paweł Szostek authored Mar 05, 2012
```
Conflicts:

	hdlmake
	src/flow.py
	src/srcfile.py
```
  7c1b2f93
- makefile_writer: allow to specify SSH port in PORT= parameter · 7745fad5
  Tomasz Wlostowski authored Jul 30, 2012
  
  7745fad5
- hdlmake_kernel: don't check TCL files, just generate run.tcl · 68609de2
  Tomasz Wlostowski authored Jul 30, 2012
  
  68609de2
- updated binary · 6b6289a1
  Tomasz Wlostowski authored Jul 27, 2012
  
  6b6289a1
- fetch.py: HDLMAKE_COREDIR should override fetchto (if->elif) · b73ba68e
  Tomasz Wlostowski authored Jul 27, 2012
  
  b73ba68e
- path.py: remove unnecessary print() call · e34d5b12
  Tomasz Wlostowski authored Jul 27, 2012
  
  e34d5b12
- fetch.py: always download to fetchto of the top level manifest · b5278c58
  Tomasz Wlostowski authored Jul 27, 2012
  
  b5278c58