Commit fd0ee5df authored by Jozsef Imrek's avatar Jozsef Imrek Committed by garcialasheras

Add new synthesis variable syn_family (needed by some tools)

parent 5e1060cd
......@@ -566,6 +566,7 @@ We can see that the only difference is that each of the top synthesis Manifest.p
- ``target``: specific targeted FPGA architecture
- ``action``: indicates that this is a synthesis process
- ``syn_device``: indicates the specific FPGA device
- ``syn_family``: indicates the specific FPGA family
- ``syn_grade``: indicates the specific FPGA speed grade
- ``syn_package``: indicates the specific FPGA package
- ``syn_top``: indicates the name of the top HDL instance/module to be synthesized.
......@@ -1176,6 +1177,8 @@ Basic synthesis variables:
+-----------------+-------------+-----------------------------------------------------------------+-----------+
| syn_device | str | Target FPGA device | None |
+-----------------+-------------+-----------------------------------------------------------------+-----------+
| syn_family | str | Target FPGA family | None |
+-----------------+-------------+-----------------------------------------------------------------+-----------+
| syn_grade | str | Speed grade of target FPGA | None |
+-----------------+-------------+-----------------------------------------------------------------+-----------+
| syn_package | str | Package variant of target FPGA | None |
......
......@@ -56,6 +56,7 @@ class ManifestParser(ConfigParser):
self.add_option('syn_name', default=None, help="Name of the folder at remote synthesis machine", type='')
self.add_option('syn_tool', default=None, help="Tool to be used in the synthesis", type='')
self.add_option('syn_device', default=None, help="Target FPGA device", type='')
self.add_option('syn_family', default=None, help="Target FPGA family", type='')
self.add_option('syn_grade', default=None, help="Speed grade of target FPGA", type='')
self.add_option('syn_package', default=None, help="Package variant of target FPGA", type='')
self.add_option('syn_top', default=None, help="Top level module for synthesis", type='')
......
......@@ -85,6 +85,7 @@ class Module(object):
self.incl_makefiles = []
self.force_tool = None
self.syn_device = None
self.syn_family = None
self.syn_grade = None
self.syn_package = None
self.syn_project = None
......@@ -391,6 +392,7 @@ class Module(object):
self.syn_name = self.manifest_dict["syn_name"]
self.syn_tool = self.manifest_dict["syn_tool"]
self.syn_device = self.manifest_dict["syn_device"]
self.syn_family = self.manifest_dict["syn_family"]
self.syn_grade = self.manifest_dict["syn_grade"]
self.syn_package = self.manifest_dict["syn_package"]
self.syn_project = self.manifest_dict["syn_project"]
......
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