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Commit a94820ca authored by Tristan Gingold's avatar Tristan Gingold
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modelsim.py: sim_path is always present but can be empty.

parent 64829b99
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hdlmake/tools/modelsim.py
View file @ a94820ca
......@@ -54,7 +54,7 @@ class ToolModelsim(MakefileVsim):
"""Print the Modelsim options to the Makefile"""
modelsim_ini_path = self.manifest_dict.get("modelsim_ini_path")
if modelsim_ini_path == None:
if "sim_path" in self.manifest_dict:
if self.manifest_dict['sim_path']:
modelsim_ini_path = os.path.join(
self.manifest_dict["sim_path"], "..")
else:
......
testsuite/057msim_windows/Makefile.ref
View file @ a94820ca
......@@ -5,7 +5,7 @@
TOP_MODULE := gate
MODELSIM_INI_PATH := ..
MODELSIM_INI_PATH := $(HDLMAKE_MODELSIM_PATH)/..
VCOM_FLAGS := -quiet -modelsimini modelsim.ini
VSIM_FLAGS :=
......
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