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Hdlmake
Commit 9cf96225 authored by Paweł Szostek's avatar Paweł Szostek
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srfile.py: don't make dependencies when not necessary

parent ddb52282
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src/srcfile.py
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......@@ -107,7 +107,6 @@ class SourceFile(IDependable, File):
class VHDLFile(SourceFile):
def __init__(self, path, library=None, vcom_opt=None):
SourceFile.__init__(self, path, library)
self.__create_deps()
if not vcom_opt:
self.vcom_opt = ""
else:
......@@ -240,7 +239,6 @@ class VerilogFile(SourceFile):
if include_dirs:
self.include_dirs.extend(include_dirs)
self.include_dirs.append(path_mod.relpath(self.dirname))
self.__create_deps()
def __create_deps(self):
# self.dep_requires = self.__search_includes()
......
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