Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
H
Hdlmake
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
15
Issues
15
List
Board
Labels
Milestones
Merge Requests
2
Merge Requests
2
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Hdlmake
Commits
6de42805
Commit
6de42805
authored
Oct 29, 2019
by
Tristan Gingold
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Add a test for libraries.
parent
65332188
Hide whitespace changes
Inline
Side-by-side
Showing
6 changed files
with
95 additions
and
1 deletion
+95
-1
makefilevsim.py
hdlmake/tools/makefilevsim.py
+1
-1
Makefile.ref
testsuite/091library/Makefile.ref
+67
-0
Manifest.py
testsuite/091library/Manifest.py
+9
-0
gate3.vhd
testsuite/091library/gate3.vhd
+12
-0
Manifest.py
testsuite/091library/gates/Manifest.py
+3
-0
test_all.py
testsuite/test_all.py
+3
-0
No files found.
hdlmake/tools/makefilevsim.py
View file @
6de42805
...
...
@@ -100,7 +100,7 @@ class MakefileVsim(MakefileSim):
(
'+'
.
join
(
self
.
manifest_dict
.
get
(
"include_dirs"
))))
libs
=
set
(
f
.
library
for
f
in
fileset
)
self
.
write
(
'LIBS := '
)
self
.
write
(
' '
.
join
(
libs
))
self
.
write
(
' '
.
join
(
sorted
(
libs
)
))
self
.
write
(
'
\n
'
)
# tell how to make libraries
self
.
write
(
'LIB_IND := '
)
...
...
testsuite/091library/Makefile.ref
0 → 100644
View file @
6de42805
########################################
# This file was generated by hdlmake #
# http://ohwr.org/projects/hdl-make/ #
########################################
TOP_MODULE
:=
gate3
MODELSIM_INI_PATH
:=
$(HDLMAKE_MODELSIM_PATH)
/..
VCOM_FLAGS
:=
-quiet
-modelsimini
modelsim.ini
VSIM_FLAGS
:=
VLOG_FLAGS
:=
-quiet
-modelsimini
modelsim.ini
VMAP_FLAGS
:=
-modelsimini
modelsim.ini
#target for performing local simulation
local
:
sim_pre_cmd simulation sim_post_cmd
VERILOG_SRC
:=
VERILOG_OBJ
:=
VHDL_SRC
:=
gate3.vhd
\
../files/gate.vhdl
\
VHDL_OBJ
:=
work/gate3/.gate3_vhd
\
sublib/gate/.gate_vhdl
\
INCLUDE_DIRS
:=
LIBS
:=
sublib work
LIB_IND
:=
sublib/.sublib work/.work
simulation
:
modelsim.ini $(LIB_IND) $(VERILOG_OBJ) $(VHDL_OBJ)
$(VERILOG_OBJ)
:
modelsim.ini
$(VHDL_OBJ)
:
$(LIB_IND) modelsim.ini
modelsim.ini
:
$(MODELSIM_INI_PATH)/modelsim.ini
cp
$<
.
2>&1
sublib/.sublib
:
(
vlib sublib
&&
vmap
$(VMAP_FLAGS)
sublib
&&
touch
sublib/.sublib
)||
rm
-rf
sublib
work/.work
:
(
vlib work
&&
vmap
$(VMAP_FLAGS)
work
&&
touch
work/.work
)||
rm
-rf
work
work/gate3/.gate3_vhd
:
gate3.vhd
\
sublib/gate/.gate_vhdl
vcom
$(VCOM_FLAGS)
-work
work
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
sublib/gate/.gate_vhdl
:
../files/gate.vhdl
vcom
$(VCOM_FLAGS)
-work
sublib
$<
@
mkdir
-p
$
(
dir
$@
)
&&
touch
$@
# USER SIM COMMANDS
sim_pre_cmd
:
sim_post_cmd
:
CLEAN_TARGETS
:=
$(LIBS)
modelsim.ini transcript
clean
:
rm
-rf
$(CLEAN_TARGETS)
mrproper
:
clean
rm
-rf
*
.vcd
*
.wlf
.PHONY
:
mrproper clean sim_pre_cmd sim_post_cmd simulation
testsuite/091library/Manifest.py
0 → 100644
View file @
6de42805
action
=
"simulation"
sim_tool
=
"modelsim"
sim_path
=
"fake_bin"
top_module
=
"gate3"
files
=
[
"gate3.vhd"
]
modules
=
{
'local'
:
'gates'
}
testsuite/091library/gate3.vhd
0 → 100644
View file @
6de42805
library
sublib
;
entity
gate3
is
port
(
i
:
in
bit
;
o
:
out
bit
);
end
gate3
;
architecture
behav
of
gate3
is
begin
inst
:
entity
sublib
.
gate
port
map
(
i
,
o
);
end
behav
;
testsuite/091library/gates/Manifest.py
0 → 100644
View file @
6de42805
library
=
'sublib'
files
=
[
'../../files/gate.vhdl'
]
testsuite/test_all.py
View file @
6de42805
...
...
@@ -487,6 +487,9 @@ def test_err_missing_module():
run
([],
path
=
"090missing_module"
)
assert
False
def
test_library
():
run_compare
(
path
=
"091library"
)
@
pytest
.
mark
.
xfail
def
test_xfail
():
"""This is a self-consistency test: the test is known to fail"""
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment