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2aee04b8
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2aee04b8
authored
Aug 02, 2016
by
Javier D. Garcia-Lasheras
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Add the -g2012 option to the VHDL demo for IVerilog
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3ef43942
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Manifest.py
tests/counter/sim/iverilog/vhdl/Manifest.py
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tests/counter/sim/iverilog/vhdl/Manifest.py
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2aee04b8
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@@ -2,6 +2,8 @@ action = "simulation"
sim_tool
=
"iverilog"
sim_top
=
"counter_tb"
iverilog_opt
=
"-g2012"
sim_pre_cmd
=
"echo IMPORTANT, IVerilog always needs a Verilog testbench, no matter if the DUT is written in VHDL!"
sim_post_cmd
=
"vvp counter_tb.vvp; gtkwave counter_tb.vcd"
...
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