Apply some clean-up to dep_file and dep_solver

parent c51998d6
......@@ -187,8 +187,6 @@ class DepFile(File):
File.__init__(self, path=file_path, module=module)
self.file_path = file_path
self.rels = set()
self._inputs = set()
self._outputs = set()
self.depends_on = set()
self.dep_level = None
self.is_parsed = False
......
......@@ -27,7 +27,6 @@ from __future__ import print_function
import logging
from .dep_file import DepFile
from .srcfile import VHDLFile, VerilogFile, SVFile
class DepParser(object):
......
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