From f41e6a576ed252c16a8b385f80ab4c0b318ff3c7 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tristan.gingold@cern.ch>
Date: Thu, 14 Sep 2023 10:43:06 +0200
Subject: [PATCH] testsuite: adjust baseline
---
testsuite/125arch_in_separate_file/Makefile.ref | 3 +--
.../126package_body_in_separate_file/Makefile.ref | 3 +--
testsuite/127arch_in_separate_file/Makefile.ref | 13 ++++++-------
testsuite/test_all.py | 3 +++
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/testsuite/125arch_in_separate_file/Makefile.ref b/testsuite/125arch_in_separate_file/Makefile.ref
index fe186f35..aa405e29 100644
--- a/testsuite/125arch_in_separate_file/Makefile.ref
+++ b/testsuite/125arch_in_separate_file/Makefile.ref
@@ -48,8 +48,7 @@ work/hdlmake/gate4_e_vhdl
vcom $(VCOM_FLAGS) -work work $<
@touch $@
-work/hdlmake/gate4_e_vhdl: ../files/gate4_e.vhdl \
-work/hdlmake/gate4_a_vhdl
+work/hdlmake/gate4_e_vhdl: ../files/gate4_e.vhdl
vcom $(VCOM_FLAGS) -work work $<
@touch $@
diff --git a/testsuite/126package_body_in_separate_file/Makefile.ref b/testsuite/126package_body_in_separate_file/Makefile.ref
index e9409237..cead807d 100644
--- a/testsuite/126package_body_in_separate_file/Makefile.ref
+++ b/testsuite/126package_body_in_separate_file/Makefile.ref
@@ -43,8 +43,7 @@ work/hdlmake/pkg5_vhdl
vcom $(VCOM_FLAGS) -work work $<
@touch $@
-work/hdlmake/pkg5_vhdl: ../files/pkg5.vhdl \
-work/hdlmake/pkg5_body_vhdl
+work/hdlmake/pkg5_vhdl: ../files/pkg5.vhdl
vcom $(VCOM_FLAGS) -work work $<
@touch $@
diff --git a/testsuite/127arch_in_separate_file/Makefile.ref b/testsuite/127arch_in_separate_file/Makefile.ref
index 11f7a595..f2aa5a92 100644
--- a/testsuite/127arch_in_separate_file/Makefile.ref
+++ b/testsuite/127arch_in_separate_file/Makefile.ref
@@ -17,12 +17,12 @@ local: sim_pre_cmd simulation sim_post_cmd
VERILOG_SRC :=
VERILOG_OBJ :=
VHDL_SRC := ../files/gate.vhdl \
-../files/gate4_x_a.vhdl \
../files/gate4_e.vhdl \
+../files/gate4_x_a.vhdl \
VHDL_OBJ := work/hdlmake/gate_vhdl \
-work/hdlmake/gate4_x_a_vhdl \
work/hdlmake/gate4_e_vhdl \
+work/hdlmake/gate4_x_a_vhdl \
INCLUDE_DIRS :=
LIBS := work
@@ -42,14 +42,13 @@ work/hdlmake/gate_vhdl: ../files/gate.vhdl
vcom $(VCOM_FLAGS) -work work $<
@touch $@
-work/hdlmake/gate4_x_a_vhdl: ../files/gate4_x_a.vhdl \
-work/hdlmake/gate_vhdl \
-work/hdlmake/gate4_e_vhdl
+work/hdlmake/gate4_e_vhdl: ../files/gate4_e.vhdl
vcom $(VCOM_FLAGS) -work work $<
@touch $@
-work/hdlmake/gate4_e_vhdl: ../files/gate4_e.vhdl \
-work/hdlmake/gate4_x_a_vhdl
+work/hdlmake/gate4_x_a_vhdl: ../files/gate4_x_a.vhdl \
+work/hdlmake/gate_vhdl \
+work/hdlmake/gate4_e_vhdl
vcom $(VCOM_FLAGS) -work work $<
@touch $@
diff --git a/testsuite/test_all.py b/testsuite/test_all.py
index bd85c270..7e3f2a12 100644
--- a/testsuite/test_all.py
+++ b/testsuite/test_all.py
@@ -600,6 +600,9 @@ def test_arch_in_separate_file_125():
def test_package_body_in_separate_file_126():
run_compare(path="126package_body_in_separate_file")
+def test_arch_in_separate_file_127():
+ run_compare(path="127arch_in_separate_file")
+
@pytest.mark.xfail
def test_xfail():
"""This is a self-consistency test: the test is known to fail"""
--
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