This merge brings 3 changes:

1. pcie_wb does not compile under mentor modelsim as default case is missing -> fixed
2. spi master file is written twice in the manifest
3. CONDITIONAL INSERTION OF XILINX ONLY MODULES INTO MANIFEST

As what concerns 3 there are few library components, which are bound to xilinx platform libraries. Under altera those do not exist and fail to resolve. Following patch conditionally inserts those library modules into the manifests only if target platform is xilinx. In all other cases it just throws info message that libs for the user-selected platform are not supported.