Programming languages used in this repository
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Verilog
47.42 %
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VHDL
46.28 %
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C
2.49 %
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SystemVerilog
0.95 %
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Python
0.94 %
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Stata
0.53 %
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Assembly
0.45 %
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Lua
0.36 %
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Makefile
0.32 %
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Tcl
0.23 %
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Shell
0.02 %
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C++
0.02 %
Commit statistics for v1.1.0 Apr 18 - Jul 24
- Total: 863 commits
- Average per day: 0.3 commits
- Authors: 25
Commits per day of month
Commits per weekday
Commits per day hour (UTC)