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Milestone due date
add dac_sel for gc_serial_dac.vhd
!68
· created
Aug 30, 2024
by
Harvey Leicester
Merged
0
updated
Aug 30, 2024
gc argb led drv
!67
· created
May 03, 2024
by
Tristan Gingold
Merged
0
updated
May 03, 2024
Add macro-based dpram for Xilinx/AMD 7Series FPGA
!66
· created
May 02, 2024
by
Frederik Pfautsch (MLE)
Merged
0
updated
May 03, 2024
add -min argument to get_property PERIOD to return the minimum value of the returned list
!65
· created
Apr 16, 2024
by
Julien Egli
Merged
0
updated
Apr 16, 2024
Resolve "Support Verilog output with gen_sourceid tool"
!63
· created
Jan 30, 2024
by
Dimitris Lampridis
Merged
1
updated
Jan 30, 2024
Resolve "Linux driver for wb simple uart"
!62
· created
Jan 24, 2024
by
Konstantinos Blantos
software
Merged
0
updated
Mar 11, 2024
Resolve "possible_fix_in_wb_uart_rx_fifo"
!61
· created
Jan 23, 2024
by
Konstantinos Blantos
Closed
0
updated
Jan 26, 2024
Create branch wb_axi_bridge_fix and add fix for wb - axi4 lite bridge
!60
· created
Jan 23, 2024
by
Quentin Genoud
Merged
0
updated
Jan 23, 2024
WIP: Resolve "inferred_async_fifo_dual_reset : spurious pulse on almost_full_int after reset"
!59
· created
Jan 22, 2024
by
Alexis Marquet
0
updated
Jan 22, 2024
Resolve "add rx/tx interrupt enable in wb_uart"
!58
· created
Jan 15, 2024
by
Konstantinos Blantos
Merged
4
updated
Jan 26, 2024
Resolve "add a fifo with mixed width"
!57
· created
Dec 21, 2023
by
Tristan Gingold
Merged
1
updated
Jan 26, 2024
Resolve "fifo: minor cleanup"
!56
· created
Dec 20, 2023
by
Tristan Gingold
Merged
0
updated
Dec 20, 2023
Resolve "demo_vunit_ghdl_testbench"
!55
· created
Dec 12, 2023
by
Konstantinos Blantos
kostas_dev
4
updated
Feb 21, 2024
Resolve "Addition of a register in wb_uart to show the endianess"
!54
· created
Dec 08, 2023
by
Konstantinos Blantos
Closed
0
updated
Jan 15, 2024
Addition of 2 bits in status register to clarify if you are using Virtual or Physical UART
!53
· created
Dec 04, 2023
by
Konstantinos Blantos
Merged
10
updated
Dec 08, 2023
WIP: Resolve "wb_uart new features"
!52
· created
Dec 04, 2023
by
Konstantinos Blantos
Closed
1
updated
Dec 04, 2023
WIP: Resolve "wb_uart new features"
!51
· created
Dec 04, 2023
by
Konstantinos Blantos
Closed
0
updated
Dec 04, 2023
update CHANGELOG sw changes
!50
· created
Oct 18, 2023
by
Federico Vaga
Merged
0
updated
Oct 18, 2023
mpsoc_int_gen: fix a dead-lock
!49
· created
Oct 10, 2023
by
Tristan Gingold
proposed_master
Merged
0
updated
Oct 10, 2023
modules/axi: add mpsoc_int_gen (to generate pcie interrupts)
!48
· created
Oct 06, 2023
by
Tristan Gingold
proposed_master
Merged
0
updated
Oct 06, 2023
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