From d2ac70a79b0d7d624fe501996a31ff82b6d98bbc Mon Sep 17 00:00:00 2001
From: "Wesley W. Terpstra" <w.terpstra@gsi.de>
Date: Tue, 5 Mar 2013 15:29:28 +0100
Subject: [PATCH] serial_lcd: generic_dpram dual_clock generic matters now --
it was wrong
---
modules/wishbone/wb_serial_lcd/wb_serial_lcd.vhd | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/modules/wishbone/wb_serial_lcd/wb_serial_lcd.vhd b/modules/wishbone/wb_serial_lcd/wb_serial_lcd.vhd
index c781a078..653dc93b 100644
--- a/modules/wishbone/wb_serial_lcd/wb_serial_lcd.vhd
+++ b/modules/wishbone/wb_serial_lcd/wb_serial_lcd.vhd
@@ -63,7 +63,7 @@ begin
g_data_width => 32,
g_size => 2**c_bits,
g_with_byte_enable => true,
- g_dual_clock => false)
+ g_dual_clock => true)
port map(
clka_i => slave_clk_i,
bwea_i => slave_i.sel,
--
GitLab