From c58840d716b787c625fa660171a80facfdc89b33 Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" <w.terpstra@gsi.de> Date: Wed, 14 Aug 2013 13:12:30 +0200 Subject: [PATCH] wbgen2: arria5 does not support this read ordering --- modules/wishbone/wbgen2/wbgen2_dpssram.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/modules/wishbone/wbgen2/wbgen2_dpssram.vhd b/modules/wishbone/wbgen2/wbgen2_dpssram.vhd index 724716a2..45905ad1 100644 --- a/modules/wishbone/wbgen2/wbgen2_dpssram.vhd +++ b/modules/wishbone/wbgen2/wbgen2_dpssram.vhd @@ -58,7 +58,7 @@ architecture syn of wbgen2_dpssram is g_data_width : natural; g_size : natural; g_with_byte_enable : boolean; - g_addr_conflict_resolution : string := "read_first"; + g_addr_conflict_resolution : string := "dont_care"; g_init_file : string := ""; g_dual_clock : boolean); port ( -- GitLab