From c0e8565370ecfcb6769236d9861809aab7bda394 Mon Sep 17 00:00:00 2001 From: Maciej Lipinski <maciej.lipinski@cern.ch> Date: Thu, 9 Apr 2020 18:03:39 +0200 Subject: [PATCH] [hdl] add missing generic to generic_dpram in altera This generic is dummy (does nothing), yet it is needed since the generic component declaration in genram_pkg.vhd has such generic. It has it, because the xilinx generic_dpram.vhd has such generic and uses it. TBD whether we want to attempt at providing similar functionality for altera --- modules/genrams/altera/generic_dpram.vhd | 1 + 1 file changed, 1 insertion(+) diff --git a/modules/genrams/altera/generic_dpram.vhd b/modules/genrams/altera/generic_dpram.vhd index 6067baf3..0a015070 100644 --- a/modules/genrams/altera/generic_dpram.vhd +++ b/modules/genrams/altera/generic_dpram.vhd @@ -43,6 +43,7 @@ entity generic_dpram is g_with_byte_enable : boolean := false; g_addr_conflict_resolution : string := "dont_care"; g_init_file : string := "none"; + g_fail_if_file_not_found : boolean := true; -- dummy (exists in Xilinx/generic) g_dual_clock : boolean := true); port( rst_n_i : in std_logic := '1'; -- synchronous reset, active LO -- GitLab