From bebe354f830bbcf43dee6d52f2dad48a430a4cd8 Mon Sep 17 00:00:00 2001
From: Jan Pospisil <j.pospisil@cern.ch>
Date: Wed, 24 Aug 2016 11:52:48 +0200
Subject: [PATCH] hdl: added assignments to (new) unspecified WB signals
Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>
---
modules/wishbone/wb_clock_crossing/xwb_clock_crossing.vhd | 1 +
modules/wishbone/wb_i2c_master/wb_i2c_master.vhd | 3 +++
modules/wishbone/wb_i2c_master/xwb_i2c_master.vhd | 3 +++
modules/wishbone/wb_spi/wb_spi.vhd | 3 +++
modules/wishbone/wb_spi/xwb_spi.vhd | 2 ++
5 files changed, 12 insertions(+)
diff --git a/modules/wishbone/wb_clock_crossing/xwb_clock_crossing.vhd b/modules/wishbone/wb_clock_crossing/xwb_clock_crossing.vhd
index eae3c49f..88272b24 100644
--- a/modules/wishbone/wb_clock_crossing/xwb_clock_crossing.vhd
+++ b/modules/wishbone/wb_clock_crossing/xwb_clock_crossing.vhd
@@ -213,4 +213,5 @@ begin
end if;
end process;
+ slave_o.int <= '0'; -- TODO: not implemented
end rtl;
diff --git a/modules/wishbone/wb_i2c_master/wb_i2c_master.vhd b/modules/wishbone/wb_i2c_master/wb_i2c_master.vhd
index f32f2c9a..2f21579b 100644
--- a/modules/wishbone/wb_i2c_master/wb_i2c_master.vhd
+++ b/modules/wishbone/wb_i2c_master/wb_i2c_master.vhd
@@ -149,6 +149,9 @@ begin
wb_out.dat(7 downto 0) <= dat_out;
wb_out.dat(wb_out.dat'left downto 8) <= (others => '0');
+ wb_out.err <= '0';
+ wb_out.rty <= '0';
+ wb_out.stall <= '0';
end rtl;
diff --git a/modules/wishbone/wb_i2c_master/xwb_i2c_master.vhd b/modules/wishbone/wb_i2c_master/xwb_i2c_master.vhd
index dab5a96a..7ff5bb4d 100644
--- a/modules/wishbone/wb_i2c_master/xwb_i2c_master.vhd
+++ b/modules/wishbone/wb_i2c_master/xwb_i2c_master.vhd
@@ -80,5 +80,8 @@ begin -- rtl
sda_pad_i => sda_pad_i,
sda_pad_o => sda_pad_o,
sda_padoen_o => sda_padoen_o);
+
+ slave_o.err <= '0';
+ slave_o.rty <= '0';
end rtl;
diff --git a/modules/wishbone/wb_spi/wb_spi.vhd b/modules/wishbone/wb_spi/wb_spi.vhd
index b31d8a6d..138d9a1f 100644
--- a/modules/wishbone/wb_spi/wb_spi.vhd
+++ b/modules/wishbone/wb_spi/wb_spi.vhd
@@ -127,4 +127,7 @@ begin
mosi_pad_o => pad_mosi_o,
miso_pad_i => pad_miso_i);
+ wb_out.rty <= '0';
+ wb_out.stall <= '0';
+
end rtl;
diff --git a/modules/wishbone/wb_spi/xwb_spi.vhd b/modules/wishbone/wb_spi/xwb_spi.vhd
index e54b3708..5df78c57 100644
--- a/modules/wishbone/wb_spi/xwb_spi.vhd
+++ b/modules/wishbone/wb_spi/xwb_spi.vhd
@@ -85,5 +85,7 @@ begin
pad_sclk_o => pad_sclk_o,
pad_mosi_o => pad_mosi_o,
pad_miso_i => pad_miso_i);
+
+ slave_o.rty <= '0';
end rtl;
--
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