diff --git a/testbench/wishbone/lm32_testsys/lm32_test_system.vhd b/testbench/wishbone/lm32_testsys/lm32_test_system.vhd
index 159ad68e771e9b1244451eb0ba3bfb01914a3d6f..37e510e4a8b43862e1ff8866b6aea37fbb3017f9 100644
--- a/testbench/wishbone/lm32_testsys/lm32_test_system.vhd
+++ b/testbench/wishbone/lm32_testsys/lm32_test_system.vhd
@@ -77,7 +77,7 @@ begin  -- rtl
 
   U_DPRAM : xwb_dpram
     generic map (
-      g_size                  => 8192,
+      g_size                  => 16384, -- must agree with sw/target/lm32/ram.ld:LENGTH / 4
       g_init_file             => "sw/main.ram",
       g_must_have_init_file   => true,
       g_slave1_interface_mode => PIPELINED,