From 98d30cc510ea68be7f64991024e3feb979bc39e9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tomasz=20W=C5=82ostowski?= <tomasz.wlostowski@cern.ch>
Date: Thu, 16 May 2013 11:30:23 +0200
Subject: [PATCH] wishbone/wb_lm32: drive unused ports in Xilinx primitive to 0
to ensure correct simulation
---
.../platform/spartan6/lm32_multiplier.v | 68 +++++++++----------
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/modules/wishbone/wb_lm32/platform/spartan6/lm32_multiplier.v b/modules/wishbone/wb_lm32/platform/spartan6/lm32_multiplier.v
index c4f32c8b..47c10a29 100644
--- a/modules/wishbone/wb_lm32/platform/spartan6/lm32_multiplier.v
+++ b/modules/wishbone/wb_lm32/platform/spartan6/lm32_multiplier.v
@@ -70,25 +70,25 @@ DSP48A1 #(
.OPMODE(8'd1),
.A(al),
.B(bl),
- .C(),
+ .C(48'h0),
.CARRYIN(),
- .D(),
+ .D(18'b0),
.CEA(~stall_x),
.CEB(~stall_x),
- .CEC(),
- .CECARRYIN(),
- .CED(),
+ .CEC(1'b0),
+ .CECARRYIN(1'b0),
+ .CED(1'b0),
.CEM(~stall_m),
- .CEOPMODE(),
+ .CEOPMODE(1'b0),
.CEP(1'b1),
.RSTA(rst_i),
.RSTB(rst_i),
- .RSTC(),
- .RSTCARRYIN(),
- .RSTD(),
+ .RSTC(1'b0),
+ .RSTCARRYIN(1'b0),
+ .RSTD(1'b0),
.RSTM(rst_i),
- .RSTOPMODE(),
- .RSTP()
+ .RSTOPMODE(1'b0),
+ .RSTP(1'b0)
);
wire [47:0] au_bl_sum;
@@ -121,23 +121,23 @@ DSP48A1 #(
.B(bl_forward),
.C({31'd0, al_bl[33:17]}),
.CARRYIN(),
- .D(),
+ .D(18'h0),
.CEA(~stall_x),
- .CEB(),
- .CEC(),
- .CECARRYIN(),
- .CED(),
+ .CEB(1'b0),
+ .CEC(1'b0),
+ .CECARRYIN(1'b0),
+ .CED(1'b0),
.CEM(~stall_m),
- .CEOPMODE(),
- .CEP(),
+ .CEOPMODE(1'b0),
+ .CEP(1'b0),
.RSTA(rst_i),
- .RSTB(),
- .RSTC(),
- .RSTCARRYIN(),
- .RSTD(),
+ .RSTB(1'b0),
+ .RSTC(1'b0),
+ .RSTCARRYIN(1'b0),
+ .RSTD(1'b0),
.RSTM(rst_i),
- .RSTOPMODE(),
- .RSTP()
+ .RSTOPMODE(1'b0),
+ .RSTP(1'b0)
);
wire [47:0] r_full;
@@ -169,24 +169,24 @@ DSP48A1 #(
.OPMODE(8'd5),
.A(bu),
.B(al),
- .C(),
+ .C(48'b0),
.CARRYIN(),
- .D(),
+ .D(18'b0),
.CEA(~stall_x),
.CEB(~stall_x),
- .CEC(),
- .CECARRYIN(),
- .CED(),
+ .CEC(1'b0),
+ .CECARRYIN(1'b0),
+ .CED(1'b0),
.CEM(~stall_m),
- .CEOPMODE(),
+ .CEOPMODE(1'b0),
.CEP(1'b1),
.RSTA(rst_i),
.RSTB(rst_i),
- .RSTC(),
- .RSTCARRYIN(),
- .RSTD(),
+ .RSTC(1'b0),
+ .RSTCARRYIN(1'b0),
+ .RSTD(1'b0),
.RSTM(rst_i),
- .RSTOPMODE(),
+ .RSTOPMODE(1'b0),
.RSTP(rst_i)
);
--
GitLab