From 6639f31a662bd22f09f67a7edd2d5af35864381c Mon Sep 17 00:00:00 2001
From: Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
Date: Tue, 15 Sep 2020 10:25:28 +0200
Subject: [PATCH] wb_fine_pulse_gen: add missing rst_serdes input
---
.../wishbone/wb_fine_pulse_gen/fine_pulse_gen_kintex7.vhd | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/modules/wishbone/wb_fine_pulse_gen/fine_pulse_gen_kintex7.vhd b/modules/wishbone/wb_fine_pulse_gen/fine_pulse_gen_kintex7.vhd
index 9b2e5ec2..6d132cbd 100644
--- a/modules/wishbone/wb_fine_pulse_gen/fine_pulse_gen_kintex7.vhd
+++ b/modules/wishbone/wb_fine_pulse_gen/fine_pulse_gen_kintex7.vhd
@@ -19,6 +19,7 @@ entity fine_pulse_gen_kintex7 is
clk_par_i : in std_logic;
clk_serdes_i : in std_logic;
+ rst_serdes_i : in std_logic;
rst_sys_n_i : in std_logic;
cont_i : in std_logic;
@@ -188,7 +189,7 @@ begin
OQ => dout_nodelay,
TBYTEIN => '0',
TCE => '0',
- RST => rst);
+ RST => rst_serdes_i);
gen_with_odelay : if g_use_odelay generate
@@ -211,7 +212,7 @@ begin
INC => '0',
ODATAIN => dout_predelay,
LD => odelay_load,
- REGRST => rst,
+ REGRST => rst_serdes_i,
LDPIPEEN => '0',
CNTVALUEIN => odelay_ntaps,
CINVCTRL => '0'
--
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