From 4f84b3e6398b07a40aa3a0f39b178f9988eeccf6 Mon Sep 17 00:00:00 2001
From: "Wesley W. Terpstra" <w.terpstra@gsi.de>
Date: Fri, 3 May 2013 15:54:12 +0200
Subject: [PATCH] altera dpram: quell modelsim warning

---
 modules/genrams/altera/generic_async_fifo.vhd   | 2 +-
 modules/genrams/altera/generic_dpram.vhd        | 2 ++
 modules/genrams/altera/generic_simple_dpram.vhd | 1 +
 modules/genrams/altera/generic_spram.vhd        | 1 +
 4 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/modules/genrams/altera/generic_async_fifo.vhd b/modules/genrams/altera/generic_async_fifo.vhd
index 33508b55..b5abde34 100644
--- a/modules/genrams/altera/generic_async_fifo.vhd
+++ b/modules/genrams/altera/generic_async_fifo.vhd
@@ -115,7 +115,7 @@ architecture syn of generic_async_fifo is
       q       : out std_logic_vector (g_data_width-1 downto 0);
       wrreq   : in  std_logic;
       data    : in  std_logic_vector (g_data_width-1 downto 0);
-      wrusedw : out std_logic_vector (f_log2_size(g_size)-1downto 0);
+      wrusedw : out std_logic_vector (f_log2_size(g_size)-1 downto 0);
       rdusedw : out std_logic_vector (f_log2_size(g_size)-1 downto 0)
       );
   end component;
diff --git a/modules/genrams/altera/generic_dpram.vhd b/modules/genrams/altera/generic_dpram.vhd
index 29401535..6067baf3 100644
--- a/modules/genrams/altera/generic_dpram.vhd
+++ b/modules/genrams/altera/generic_dpram.vhd
@@ -79,6 +79,7 @@ architecture syn of generic_dpram is
       return "DONT_CARE";
     else
       assert (false) report "generic_dpram: g_addr_conflict_resolution must be: read_first, write_first, dont_care" severity failure;
+      return "DONT_CARE";
     end if;
   end f_sameport_order;
   
@@ -92,6 +93,7 @@ architecture syn of generic_dpram is
       return "DONT_CARE";
     else
       assert (false) report "generic_dpram: g_addr_conflict_resolution must be: read_first, write_first, dont_care" severity failure;
+      return "DONT_CARE";
     end if;
   end f_diffport_order;
   
diff --git a/modules/genrams/altera/generic_simple_dpram.vhd b/modules/genrams/altera/generic_simple_dpram.vhd
index f89efa13..69f89c47 100644
--- a/modules/genrams/altera/generic_simple_dpram.vhd
+++ b/modules/genrams/altera/generic_simple_dpram.vhd
@@ -69,6 +69,7 @@ architecture syn of generic_simple_dpram is
       return "DONT_CARE";
     else
       assert (false) report "generic_simple_dpram: g_addr_conflict_resolution must be: read_first, write_first, dont_care" severity failure;
+      return "DONT_CARE";
     end if;
   end f_diffport_order;
   
diff --git a/modules/genrams/altera/generic_spram.vhd b/modules/genrams/altera/generic_spram.vhd
index 1df90af2..a6b4dcf4 100644
--- a/modules/genrams/altera/generic_spram.vhd
+++ b/modules/genrams/altera/generic_spram.vhd
@@ -63,6 +63,7 @@ architecture syn of generic_spram is
       return "DONT_CARE";
     else
       assert (false) report "generic_spram: g_addr_conflict_resolution must be: read_first, write_first, dont_care" severity failure;
+      return "DONT_CARE";
     end if;
   end f_sameport_order;
   
-- 
GitLab