diff --git a/testbench/wishbone/lm32_testsys/lm32_test_system.vhd b/testbench/wishbone/lm32_testsys/lm32_test_system.vhd
index e62f916cb2a88a77788c09e82011d6751f79e714..1559f160e21ac47520e5e7452014c40c0ef4163c 100644
--- a/testbench/wishbone/lm32_testsys/lm32_test_system.vhd
+++ b/testbench/wishbone/lm32_testsys/lm32_test_system.vhd
@@ -50,7 +50,7 @@ begin  -- rtl
 
   U_CPU : xwb_lm32
     generic map (
-      g_profile => "minimal")
+      g_profile => "medium")
     port map (
       clk_sys_i => clk_sys_i,
       rst_n_i   => rst_n_i,