diff --git a/modules/wishbone/wb_lm32/generated/lm32_allprofiles.v b/modules/wishbone/wb_lm32/generated/lm32_allprofiles.v
index af57302c2115099032fd41b5f8ed608fdb10a422..2b0afba95ee0b7d673cb271631280c7fc732b706 100644
--- a/modules/wishbone/wb_lm32/generated/lm32_allprofiles.v
+++ b/modules/wishbone/wb_lm32/generated/lm32_allprofiles.v
@@ -5160,7 +5160,7 @@ end
-
+
@@ -18093,7 +18093,7 @@ end
-
+
@@ -31026,7 +31026,7 @@ end
-
+
@@ -43663,7 +43663,7 @@ end
-
+
@@ -56474,7 +56474,7 @@ end
-
+
@@ -69199,7 +69199,7 @@ end
-
+
@@ -81974,7 +81974,7 @@ end
-
+
@@ -89456,6 +89456,8 @@ endmodule
+
+
@@ -90160,15 +90162,18 @@ wire [ (2-1):0] D_BTE_O;
-
-
-
-
-
-
-
+wire [ ((32-2)+2-1):2] trace_pc;
+wire trace_pc_valid;
+wire trace_exception;
+wire [ (3-1):0] trace_eid;
+wire trace_eret;
+
+
+wire trace_bret;
+
+
@@ -90280,15 +90285,18 @@ lm32_cpu_wr_node
.D_RTY_I (D_RTY_I),
-
-
-
-
-
-
-
+ .trace_pc (trace_pc),
+ .trace_pc_valid (trace_pc_valid),
+ .trace_exception (trace_exception),
+ .trace_eid (trace_eid),
+ .trace_eret (trace_eret),
+
+
+ .trace_bret (trace_bret),
+
+
@@ -91451,15 +91459,18 @@ module lm32_cpu_wr_node (
D_RTY_I,
-
-
-
-
-
-
-
+ trace_pc,
+ trace_pc_valid,
+ trace_exception,
+ trace_eid,
+ trace_eret,
+
+ trace_bret,
+
+
+
@@ -91639,21 +91650,24 @@ input D_RTY_I;
-
-
-
-
-
-
-
-
-
-
-
-
-
+output [ ((32-2)+2-1):2] trace_pc;
+reg [ ((32-2)+2-1):2] trace_pc;
+output trace_pc_valid;
+reg trace_pc_valid;
+output trace_exception;
+reg trace_exception;
+output [ (3-1):0] trace_eid;
+reg [ (3-1):0] trace_eid;
+output trace_eret;
+reg trace_eret;
+
+output trace_bret;
+reg trace_bret;
+
+
+
@@ -91868,9 +91882,10 @@ wire eret_d;
reg eret_x;
wire eret_q_x;
-
-
+reg eret_m;
+reg eret_w;
+
@@ -91878,9 +91893,10 @@ wire bret_d;
reg bret_x;
wire bret_q_x;
-
-
+reg bret_m;
+reg bret_w;
+
@@ -92042,8 +92058,9 @@ wire [ ((32-2)+2-1):2] pc_x;
wire [ ((32-2)+2-1):2] pc_m;
wire [ ((32-2)+2-1):2] pc_w;
-
+reg [ ((32-2)+2-1):2] pc_c;
+
@@ -92133,9 +92150,10 @@ reg [ (32-2)+2-1:8] deba;
reg [ (3-1):0] eid_x;
-
-
+reg [ (3-1):0] eid_m;
+reg [ (3-1):0] eid_w;
+
@@ -94405,19 +94423,23 @@ begin
-
-
+ eid_m <= eid_x;
+ eret_m <= eret_q_x;
+
-
-
+
+
+ bret_m <= bret_q_x;
+
+
write_enable_m <= exception_x == 1'b1 ? 1'b1 : write_enable_x;
@@ -94464,12 +94486,15 @@ begin
write_idx_w <= write_idx_m;
-
-
-
-
+ eid_w <= eid_m;
+ eret_w <= eret_m;
+
+ bret_w <= bret_m;
+
+
+
write_enable_w <= write_enable_m;
@@ -94577,65 +94602,74 @@ end
-
-
-
-
-
-
-
-
+always @(posedge clk_i )
+begin
+ if (rst_i == 1'b1)
+ begin
+ trace_pc_valid <= 1'b0;
+ trace_pc <= { (32-2){1'b0}};
+ trace_exception <= 1'b0;
+ trace_eid <= 3'h0;
+ trace_eret <= 1'b0;
+
+
+ trace_bret <= 1'b0;
-
-
-
-
-
-
+ pc_c <= eba_reset/4;
+ end
+ else
+ begin
+ trace_pc_valid <= 1'b0;
-
-
+
+ if ((debug_exception_q_w == 1'b1) || (non_debug_exception_q_w == 1'b1))
+
-
-
-
-
-
-
-
-
-
-
+
+ begin
+ trace_exception <= 1'b1;
+ trace_pc_valid <= 1'b1;
+ trace_pc <= pc_w;
+ trace_eid <= eid_w;
+ end
+ else
+ trace_exception <= 1'b0;
+ if ((valid_w == 1'b1) && (!kill_w))
+ begin
-
-
+
+ begin
-
-
-
+ trace_pc_valid <= 1'b1;
+ trace_pc <= pc_w;
+ end
-
+ pc_c <= pc_w;
-
-
-
+ trace_eret <= eret_w;
+
-
-
-
-
+ trace_bret <= bret_w;
-
-
-
+ end
+ else
+ begin
+ trace_eret <= 1'b0;
+
+ trace_bret <= 1'b0;
+
+ end
+ end
+end
+
diff --git a/modules/wishbone/wb_lm32/lm32.profiles b/modules/wishbone/wb_lm32/lm32.profiles
index 4d9f514664299e6e7aa43ed32a16e0bf7121a964..b7f7cfeb8162176607d99616125d0637013b1ce2 100644
--- a/modules/wishbone/wb_lm32/lm32.profiles
+++ b/modules/wishbone/wb_lm32/lm32.profiles
@@ -5,4 +5,4 @@ medium_debug CFG_PL_MULTIPLY_ENABLED CFG_PL_BARREL_SHIFT_ENABLED CFG_SIGN_EXTEND
medium_icache_debug CFG_PL_MULTIPLY_ENABLED CFG_PL_BARREL_SHIFT_ENABLED CFG_SIGN_EXTEND_ENABLED CFG_ICACHE_ENABLED CFG_WITH_DEBUG CFG_INTERRUPTS_ENABLED
full CFG_PL_MULTIPLY_ENABLED CFG_PL_BARREL_SHIFT_ENABLED CFG_SIGN_EXTEND_ENABLED CFG_INTERRUPTS_ENABLED CFG_MC_DIVIDE_ENABLED CFG_FAST_UNCONDITIONAL_BRANCH CFG_ICACHE_ENABLED CFG_DCACHE_ENABLED CFG_BUS_ERRORS_ENABLED
full_debug CFG_PL_MULTIPLY_ENABLED CFG_PL_BARREL_SHIFT_ENABLED CFG_SIGN_EXTEND_ENABLED CFG_INTERRUPTS_ENABLED CFG_MC_DIVIDE_ENABLED CFG_FAST_UNCONDITIONAL_BRANCH CFG_ICACHE_ENABLED CFG_DCACHE_ENABLED CFG_BUS_ERRORS_ENABLED CFG_WITH_DEBUG
-wr_node CFG_PL_MULTIPLY_ENABLED CFG_PL_BARREL_SHIFT_ENABLED CFG_SIGN_EXTEND_ENABLED CFG_INTERRUPTS_ENABLED CFG_IRAM_ENABLED CFG_MC_DIVIDE_ENABLED CFG_ENABLE_PIN_ENABLED CFG_DEBUG_REGS_ENABLED CFG_DEBUG_ENABLED CFG_HW_DEBUG_ENABLED CFG_BUS_ERRORS_ENABLED
\ No newline at end of file
+wr_node CFG_PL_MULTIPLY_ENABLED CFG_PL_BARREL_SHIFT_ENABLED CFG_SIGN_EXTEND_ENABLED CFG_INTERRUPTS_ENABLED CFG_IRAM_ENABLED CFG_MC_DIVIDE_ENABLED CFG_ENABLE_PIN_ENABLED CFG_DEBUG_REGS_ENABLED CFG_DEBUG_ENABLED CFG_HW_DEBUG_ENABLED CFG_BUS_ERRORS_ENABLED CFG_TRACE_ENABLED
\ No newline at end of file
diff --git a/modules/wishbone/wb_lm32/src/lm32_cpu.v b/modules/wishbone/wb_lm32/src/lm32_cpu.v
index ad20e504fe8a4312b0e3a037914deaaf77666028..5f577be75e34320e366bcea15b816d876e1d2660 100644
--- a/modules/wishbone/wb_lm32/src/lm32_cpu.v
+++ b/modules/wishbone/wb_lm32/src/lm32_cpu.v
@@ -2795,7 +2795,7 @@ begin
if ((valid_w == `TRUE) && (!kill_w))
begin
// An instruction is commiting. Determine if it is non-sequential
- if (pc_c + 1'b1 != pc_w)
+// if (pc_c + 1'b1 != pc_w)
begin
// Non-sequential instruction
trace_pc_valid <= `TRUE;