From 10c74954ff3409ac9906e5ca97c4e17fdae9c64b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tomasz=20W=C5=82ostowski?= <tomasz.wlostowski@cern.ch> Date: Fri, 27 Apr 2012 10:59:26 +0200 Subject: [PATCH] genrams/generic_shiftreg_fifo: don't clear the FIFO contents on reset (this was causing inference of FFs instead of SRLs) --- modules/genrams/generic_shiftreg_fifo.vhd | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/modules/genrams/generic_shiftreg_fifo.vhd b/modules/genrams/generic_shiftreg_fifo.vhd index 47d54327..1c19e4eb 100644 --- a/modules/genrams/generic_shiftreg_fifo.vhd +++ b/modules/genrams/generic_shiftreg_fifo.vhd @@ -51,8 +51,8 @@ use work.genram_pkg.all; entity generic_shiftreg_fifo is generic ( - g_data_width : integer; - g_size : integer + g_data_width : integer := 128; + g_size : integer := 32 ); port ( rst_n_i : in std_logic := '1'; @@ -96,11 +96,11 @@ begin p_data_srl : process(clk_i) begin if rising_edge(clk_i) then - if rst_n_i = '0'then - for i in 0 to c_srl_length-1 loop - fifo_store(i) <= (others => '0'); - end loop; -- i - elsif do_write = '1' then +-- if rst_n_i = '0'then +-- for i in 0 to c_srl_length-1 loop +-- fifo_store(i) <= (others => '0'); +-- end loop; -- i + if do_write = '1' then fifo_store <= fifo_store(fifo_store'left - 1 downto 0) & d_i; end if; end if; -- GitLab