-- -*- Mode: LUA; tab-width: 2 -*-

peripheral {
	 name = "Simple Wishbone UART";
	 description = "A simple Wishbone UART (8N1 mode) with programmable baud rate. ";
	 prefix = "uart";
	 hdl_entity = "simple_uart_wb";

	 reg {
			name = "Status Register";
			prefix = "SR";
			
			field {
				 name = "TX busy";
				 description = "1: UART is busy transmitting a byte\n0: UART is idle and ready to transmit next byte";
				 prefix = "TX_BUSY";
				 type = BIT;
				 access_bus = READ_ONLY;
				 access_dev = WRITE_ONLY;
			};

			field {
				 name = "RX ready";
				 description = "1: UART received a byte and its in RXD register\n0: no data in RXD register";

				 prefix = "RX_RDY";
				 type = BIT;
				 access_bus = READ_ONLY;
				 access_dev = WRITE_ONLY;
			};
			
	 };

	 reg {
			name = "Baudrate control register";
			description = "Register controlling the UART baudrate";
			prefix = "BCR";

			field {
				 name = "Baudrate divider setting";
				 description = "Baudrate setting. The value can be calculated using the following equation:\
				 BRATE = ((Baudrate * 8) << 9 + (ClockFreq >> 8)) / (ClockFreq >> 7)";
				 size = 32;
				 type = PASS_THROUGH;
			};
	 };

	 reg {
			name = "Transmit data regsiter";
			prefix = "TDR";
			
			field {
				 name = "Transmit data";
				 prefix = "TX_DATA";
				 size = 8;
				 type = PASS_THROUGH;
			};
	 };
	 
	 reg {
			name = "Receive data regsiter";
			prefix = "RDR";
			field {
				 ack_read = "rdr_rack_o";
				 name = "Received data";
				 prefix = "RX_DATA";
				 size = 8;
				 type = SLV;
				 access_bus = READ_ONLY;
				 access_dev = WRITE_ONLY;
			};
	 };

   reg {
      name = "Host VUART Tx register";
      prefix = "HOST_TDR";

      field {
         name = "TX Data";
         prefix = "DATA";
         type = PASS_THROUGH;
         size = 8;
      };

      field {
         name = "TX Ready";
         prefix = "RDY";
         type= BIT;
         access_dev= WRITE_ONLY;
         access_bus=READ_ONLY;
      };
   };

   reg {
      name = "Host VUART Rx register";
      prefix = "HOST_RDR";

      field {
         ack_read = "host_rack_o";
         name = "RX Data";
         prefix = "DATA";
         type = SLV;
         size = 8;
         access_dev= WRITE_ONLY;
         access_bus=READ_ONLY;
      };

      field {
         name = "RX Ready";
         prefix = "RDY";
         type= BIT;
         access_dev= WRITE_ONLY;
         access_bus=READ_ONLY;
      };

      field {
         name = "RX FIFO Count";
         prefix = "COUNT";
         type = SLV;
         size = 16;
         access_dev= WRITE_ONLY;
         access_bus=READ_ONLY;
      };
   };
};