Commits · wip-v2.0 · Projects / FSI Data Acquisition Path Gateware and Software · Open Hardware Repository

04 May, 2022 1 commit
- Fixed AXI S src address for read/write · 61ff5053
  Maciej Lipinski authored May 04, 2022
  
  61ff5053
29 Apr, 2022 1 commit
- Added unused AXI output signals to avoid warnings · 9816a634
  Maciej Lipinski authored Apr 29, 2022
  
  9816a634
28 Apr, 2022 2 commits
- Make changes needed for the diot_sys_acq_ip to work as · 07b09098
  Maciej Lipinski authored Apr 28, 2022
```
bd module:
- change records into plain std_logic_vectors
- add attributes
```
  07b09098
- Copy diot_sys_acq_ip.vhd into diot_sys_acq_ip_bd_module.vhd · a6de6234
  Maciej Lipinski authored Apr 28, 2022
  
  a6de6234
21 Feb, 2022 2 commits
- correct fetcho in manifest of peripheral baord · 29e95c85
  Maciej Lipinski authored Feb 21, 2022
  
  29e95c85
- apperently not significant change · 9eaa3f0a
  Maciej Lipinski authored Feb 21, 2022
  
  9eaa3f0a
02 Dec, 2021 10 commits
- port the latest changes to diot_sys_top (all commits with "diot_sys_top" in… · 18e035b8
  Maciej Lipinski authored Dec 02, 2021
```
port the latest changes to diot_sys_top (all commits with "diot_sys_top" in their name) to the diot sys acq ip
```
  18e035b8
- tentatively remove bufg before pll · a790d75b
  Tristan Gingold authored Dec 02, 2021
  
  a790d75b
- diot_sys_top.xdc: add a dont_touch on bufg oserdes · 2811b47f
  Tristan Gingold authored Dec 02, 2021
  
  2811b47f
- diot_sys_top: set additional constraint · 0baec4c9
  Tristan Gingold authored Dec 02, 2021
  
  0baec4c9
- diot_sys_top: add a bufg in front of pll. · 3385f559
  Tristan Gingold authored Dec 01, 2021
  
  3385f559
- diot_sys_top: slightly improve bufgce_div distribution · bd4ca0f1
  Tristan Gingold authored Dec 01, 2021
  
  bd4ca0f1
- diot_sys_top: try with less bufgce_div · 93ef122b
  Tristan Gingold authored Dec 01, 2021
  
  93ef122b
- diot_sys_top: insert a bufg before the bufgce_div · 1028f2aa
  Tristan Gingold authored Dec 01, 2021
  
  1028f2aa
- diot_sys_top: use pll, use bufgce_div per clock region · 173261ac
  Tristan Gingold authored Dec 01, 2021
  
  173261ac
- port previous commit to diot sys acq ip · 815a0f73
  Maciej Lipinski authored Dec 02, 2021
  
  815a0f73
29 Nov, 2021 7 commits
- sys_top: use an MMCM and bufg (no more bufgce_div) WIP · 6a8c3f3b
  Tristan Gingold authored Nov 29, 2021
  
  6a8c3f3b
- port previous changes to diot sys acq IP · 8f3e4ad8
  Maciej Lipinski authored Nov 29, 2021
  
  8f3e4ad8
- sys: add another bufgce_div for oserdes clk400. WIP · 528d3095
  Tristan Gingold authored Nov 29, 2021
  
  528d3095
- port the previous commit to diot sys acq ip · eda04460
  Maciej Lipinski authored Nov 29, 2021
  
  eda04460
- diot_sys_top: use a new bufgce_div for clk_100m serdes (WIP, just a test) · 4b709eda
  Tristan Gingold authored Nov 29, 2021
  
  4b709eda
- port the previous commit to the diot sys qcq iP · d8b900a0
  Maciej Lipinski authored Nov 29, 2021
  
  d8b900a0
- rtl/sys: use bufgce_div for clk_100m (to reduce the skew TBC) · 892cb8c2
  Tristan Gingold authored Nov 29, 2021
  
  892cb8c2
26 Nov, 2021 2 commits
- Port changes of diot_sys_top to diot_sys_acq_ip from commit 81d2b6d6 · 50c825fe
  Maciej Lipinski authored Nov 26, 2021
  
  50c825fe
- sys_top_dma.vhd: clear fifo errors and max at the start of a transfer · b4d09c9e
  Tristan Gingold authored Nov 24, 2021
  
  b4d09c9e
23 Nov, 2021 5 commits
- sys: add dma_done register field (not tested) · 81d2b6d6
  Tristan Gingold authored Nov 23, 2021
  
  81d2b6d6
- add path to ip_cores to Manifest · 35469023
  Maciej Lipinski authored Nov 23, 2021
  
  35469023
- TMP: modify libs to make it work with vivado and top diot-sb-zu project · a7b3a863
  Maciej Lipinski authored Nov 23, 2021
  
  a7b3a863
- modify patter to have 0xCA |chan_num · 239062b8
  Maciej Lipinski authored Nov 23, 2021
  
  239062b8
- Add board detection signals · 1e17e243
  Maciej Lipinski authored Nov 23, 2021
  
  1e17e243
15 Nov, 2021 2 commits
- Adapt the top IP contenct (changes with respect to the original top) · d6ad6edd
  Maciej Lipinski authored Nov 15, 2021
  
  d6ad6edd
- Initiate top of the FSI DIOT SB ACQ core. · adc1b132
  Maciej Lipinski authored Nov 15, 2021
```
The code stolen from the diot_sys_top used as the bases for further
changes
```
  adc1b132
02 Nov, 2021 1 commit
- sw: add software · 86ae221e
  Tristan Gingold authored Nov 02, 2021
  
  86ae221e
23 Sep, 2021 3 commits
- sys: change patterns, also resync serdes · 2f78019e
  Tristan Gingold authored Sep 23, 2021
  
  2f78019e
- periph_adc_top: use set_max_delay · 46a5100e
  Tristan Gingold authored Sep 23, 2021
  
  46a5100e
- fsi_adc_top: adjust blinking led · 7c570f1b
  Tristan Gingold authored Sep 23, 2021
  
  7c570f1b
14 Sep, 2021 4 commits
- diot_sys_top: add a register to improve timing · 99b9f930
  Tristan Gingold authored Sep 14, 2021
  
  99b9f930
- diot_sys_top: set DIFF_TERM to true for LVDS · 1bd7cec9
  Tristan Gingold authored Sep 14, 2021
  
  1bd7cec9
- periph_adc_top: adjust constraints (async clocks) · dad96b76
  Tristan Gingold authored Sep 14, 2021
  
  dad96b76
- fsi: add a synchronizer, adjust constraints. · 4ce12b7a
  Tristan Gingold authored Sep 14, 2021
  
  4ce12b7a