Commits · ddc0466da1ea960c61c64597aca5367814d4397d · Projects / VME FMC Carrier VFC

03 Feb, 2011 1 commit
- nothing, just sync · ddc0466d
  Andrea Boccardi authored Feb 03, 2011
  
  ddc0466d
31 Jan, 2011 2 commits
- chenges in the use of the FP gpio · 58639a1a
  Andrea Boccardi authored Jan 31, 2011
  
  58639a1a
- ... · 777894d8
  Andrea Boccardi authored Jan 31, 2011
  
  777894d8
28 Jan, 2011 3 commits
- still trying to synch · f7146861
  Andrea Boccardi authored Jan 28, 2011
  
  f7146861
- Synch problem and I am recommitting. · 0b0fcfdb
  Andrea Boccardi authored Jan 28, 2011
  
  0b0fcfdb
- clock changed to VCTXO and timeout for the VME accesses reduced · 52f1c4f3
  Andrea Boccardi authored Jan 28, 2011
  
  52f1c4f3
25 Jan, 2011 1 commit
- added the readout of some regs I forgot · 3887fd24
  Andrea Boccardi authored Jan 25, 2011
  
  3887fd24
24 Jan, 2011 1 commit
- added xilinx docs about gbit txrx · c4f5c9f5
  Andrea Boccardi authored Jan 24, 2011
  
  c4f5c9f5
12 Jan, 2011 2 commits
- Synthesized for 100MHz accesses to the SRAMs · bd636d36
  Andrea Boccardi authored Jan 12, 2011
  
  bd636d36
- Sram accesses forced to be at 100MHz · 0f297cf7
  Andrea Boccardi authored Jan 12, 2011
  
  0f297cf7
11 Jan, 2011 2 commits
- end of day data save · 6f2550fb
  Andrea Boccardi authored Jan 11, 2011
  
  6f2550fb
- Synthesized Appl and Syst FPGA for the control of the SRAMs · 803158d3
  Andrea Boccardi authored Jan 11, 2011
  
  803158d3
10 Jan, 2011 1 commit
- Added a simple SRAM controller in the Application FPGA · 88e03536
  Andrea Boccardi authored Jan 10, 2011
  
  88e03536
06 Jan, 2011 3 commits
- corrected error in the ucf file · cb70c6e4
  Andrea Boccardi authored Jan 06, 2011
  
  cb70c6e4
- as before (forgot a file) · dccb0d8b
  Andrea Boccardi authored Jan 06, 2011
  
  dccb0d8b
- change of VmeInt in simulation · 77de1364
  Andrea Boccardi authored Jan 06, 2011
  
  77de1364
21 Dec, 2010 1 commit
- .. · 33c447a0
  Andrea Boccardi authored Dec 21, 2010
  
  33c447a0
20 Dec, 2010 7 commits
- changed the clock source to the VCTCXO · 12b83ada
  Andrea Boccardi authored Dec 20, 2010
  
  12b83ada
- ... · bd941eab
  Andrea Boccardi authored Dec 20, 2010
  
  bd941eab
- debug leds and FP lemo changes · af702851
  Andrea Boccardi authored Dec 20, 2010
  
  af702851
- Added ApplicationFpga Xilinx project · 936d57a5
  Andrea Boccardi authored Dec 20, 2010
  
  936d57a5
- changed the clk_ik to be a proper input in Ser2MstWB · 6ee3e428
  Andrea Boccardi authored Dec 20, 2010
  
  6ee3e428
- added a doc, recompiled the system FPGA · 265c6bd0
  Andrea Boccardi authored Dec 20, 2010
  
  265c6bd0
- hanged the front pannel led frequency · cd70b752
  Andrea Boccardi authored Dec 20, 2010
  
  cd70b752
17 Dec, 2010 6 commits
- fixed a problem in the leds monostable · 56cc6994
  Andrea Boccardi authored Dec 17, 2010
  
  56cc6994
- Small changes in the files · c3d17ad2
  Andrea Boccardi authored Dec 17, 2010
  
  c3d17ad2
- synch problem happened with the previous commit · e1d3c96b
  Andrea Boccardi authored Dec 17, 2010
  
  e1d3c96b
- rerun of ISE with added timing constraints · 0895a9f9
  Andrea Boccardi authored Dec 17, 2010
  
  0895a9f9
- Enabled the output of the Si57x osc · 36769977
  Andrea Boccardi authored Dec 17, 2010
  
  36769977
- fixed the simulation afetr the changes needed for the ISE project · 22a718f4
  Andrea Boccardi authored Dec 17, 2010
  
  22a718f4
16 Dec, 2010 1 commit
- Added the Xilinx ISE project. · 23b1b4b5
  Andrea Boccardi authored Dec 16, 2010
```
Some Verilog file had to be modified, simulation to be checked
```
  23b1b4b5
15 Dec, 2010 1 commit
- nothing major · e3bedab5
  Andrea Boccardi authored Dec 15, 2010
  
  e3bedab5
13 Dec, 2010 1 commit
- minor changes in the structure of the project · 8cac29ef
  Andrea Boccardi authored Dec 13, 2010
  
  8cac29ef
10 Dec, 2010 1 commit
- updates in the fw · b46b223e
  Andrea Boccardi authored Dec 10, 2010
  
  b46b223e
06 Dec, 2010 2 commits
- Removed from the repository the vcd simulation output · 0fd775fd
  Andrea Boccardi authored Dec 06, 2010
  
  0fd775fd
- Updated the simulation and added some Verilog models · 393b47b8
  Andrea Boccardi authored Dec 06, 2010
  
  393b47b8
11 Nov, 2010 2 commits
- updated the paths for the simulation · e10d9b2b
  Andrea Boccardi authored Nov 11, 2010
  
  e10d9b2b
- Updated project. Preliminary structure: some paths are broken and will be fixed… · 8d2947ac
  Andrea Boccardi authored Nov 11, 2010
```
Updated project. Preliminary structure: some paths are broken and will be fixed in the next release.
```
  8d2947ac
10 Aug, 2010 1 commit
- Latest version: files used for the production · ed3b9eff
  Andrea Boccardi authored Aug 10, 2010
  
  ed3b9eff
25 Jun, 2010 1 commit
- adding the most recent Altium files · 2d39e7d3
  Andrea Boccardi authored Jun 25, 2010
  
  2d39e7d3