- 29 Jul, 2021 2 commits
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 11 Dec, 2020 1 commit
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Federico Vaga authored
At the end the carrier offset value for White-Rabbit has been always constant and it depends on the hardware: - SVEC: 3000 ps - SPEC: 0 ps so, instead of complicate users life by setting this module parameter, here I am embedding it into the platform_data for the TDC. The ideal solution would be to ignore this value in software and to apply it in HDL directly. Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 09 Dec, 2020 1 commit
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 04 Dec, 2020 2 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 18 Nov, 2020 2 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 17 Nov, 2020 6 commits
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Federico Vaga authored
8.0.0.rc1 - 2020-11-17 ====================== Added ----- - hdl,sw: double buffering DMA support for faster timestamping - hdl,sw: design built on top of spec-base and svec-base - tst: integration tests with pytest
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Tristan Gingold authored
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Tristan Gingold authored
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Federico Vaga authored
wbgen2 does not generate the correct header file, wrong offset. Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 16 Nov, 2020 6 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 16 Oct, 2020 3 commits
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Tristan Gingold authored
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Tristan Gingold authored
The block cannot be completly removed as it defines some registers that are still used even when the fifos are not present.
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Tristan Gingold authored
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- 15 Oct, 2020 6 commits
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Tristan Gingold authored
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Tristan Gingold authored
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Federico Vaga authored
100ns is the very minimum that the TDC can accept, give 1ns of margin Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 14 Oct, 2020 1 commit
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 12 Oct, 2020 2 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 07 Oct, 2020 1 commit
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 06 Oct, 2020 4 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
The kernel API sg_alloc_table_from_pages() takes a start offset. The problem is that we may use vmalloc() which have a start offset, but it could have an offset on each page. Not considering this offset leads to DMA transfers which are partially performed on the wrong buffer Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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- 05 Oct, 2020 3 commits
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Federico Vaga authored
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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Tristan Gingold authored
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