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FMC TDC 1ns 5cha
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FMC TDC 1ns 5cha
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d81325e5
Commit
d81325e5
authored
Nov 17, 2020
by
Federico Vaga
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update CHANGELOG
Signed-off-by:
Federico Vaga
<
federico.vaga@cern.ch
>
parent
7f374b72
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CHANGELOG.rst
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d81325e5
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@@ -6,8 +6,13 @@
Changelog
=========
Unreleased
==========
8.0.0.rc1 - 2020-11-17
======================
Added
-----
- hdl,sw: double buffering DMA support for faster timestamping
- hdl,sw: design built on top of spec-base and svec-base
- tst: integration tests with pytest
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