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FMC TDC 1ns 5cha
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FMC TDC 1ns 5cha
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10b3413b
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10b3413b
authored
Mar 19, 2022
by
Adam Wujek
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doc: add sample's data format
Signed-off-by:
Adam Wujek
<
dev_public@wujek.eu
>
parent
769bb6bd
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doc/gateware/index.rst
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@@ -75,3 +75,33 @@ a different branch remember to update the submodules as well.::
.. _`SPEC`: https://ohwr.org/project/spec
.. _`SVEC`: https://ohwr.org/project/svec
.. _`Wr cores`: https://ohwr.org/project/wr-cores
Data Format
===========
The TDC gateware is retrieving timestamps generated by the ACAM chip, it is
adapting them to a comprehensive format and it is then making them available
to the PCIe interface in a circular buffer. Each final timestamp is a 128-bit
word with the following structure:
+--------+-----------------------------------------------------------------+
|Bits |Description |
+========+=================================================================+
|[127:96]| Metadata |
| +-----------------------------------------------------------------+
| |[127..125]: Input Channel from 0 to 4 |
| +-----------------------------------------------------------------+
| |[123] : Edge Type, "1" means rising edge, "0" means falling |
| +-----------------------------------------------------------------+
| |[122..96] : not used |
+--------+-----------------------------------------------------------------+
|[95:64] |Local UTC time: the resolution is 1 s |
+--------+-----------------------------------------------------------------+
|[63:32] |Coarse time within the current UTC time: the resolution is 8 ns |
+--------+-----------------------------------------------------------------+
|[31:0] |Fine time: the resolution is 81.03 ps |
+--------+-----------------------------------------------------------------+
As the structure indicates, each timestamp is referred to a UTC second.
The coarse and fine times indicate with 81.03 ps resolution the amount of time
passed after the last UTC second.
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