Commit cedaf701 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski

kernel: interrupt support throuth VIC (SVEC only so far)

parent 3c88accd
......@@ -146,7 +146,6 @@ struct fmctdc_dev {
int ft_carrier_base;
int ft_irq_base;
/* IRQ base index (for SVEC) */
int irq_shift;
struct fmc_device *fmc;
struct zio_device *zdev, *hwzdev;
/* is acquisition mode active? */
......
......@@ -281,7 +281,9 @@ int ft_probe(struct fmc_device *fmc)
NULL);
ft->ft_carrier_base =
fmc_find_sdb_device(fmc->sdb, 0xce42, 0x603, NULL);
ft->ft_irq_base = fmc_find_sdb_device(fmc->sdb, 0xce42, 0x605, NULL);
/* fixme: use SDB */
ft->ft_irq_base = ft->ft_core_base + 0x2000;
/* FIXME/UGLY HACK: enumerate sub-cores via SDB (requires some HDL cleanup:
at least the whole Wishbone interconnect must be clocked before we proceed
......@@ -293,11 +295,8 @@ int ft_probe(struct fmc_device *fmc)
ft->ft_dma_base =
fmc_find_sdb_device(fmc->sdb, 0xce42, 0x601, NULL);
/* FIXME: the HDL uses custom IRQ controller (not the VIC). IRQ lines are hardcoded. */
ft->irq_shift = 0;
} else {
ft->ft_owregs_base = ft->ft_core_base + 0x1000;
ft->irq_shift = fmc->slot_id * 3;
}
if (ft_verbose) {
......@@ -309,6 +308,7 @@ int ft_probe(struct fmc_device *fmc)
spin_lock_init(&ft->lock);
/* Retrieve calibration from the eeprom, and validate */
ret = ft_handle_eeprom_calibration(ft);
if (ret < 0)
......
......@@ -23,6 +23,7 @@
#include <linux/zio.h>
#include <linux/zio-trigger.h>
#include <linux/zio-buffer.h>
#include "fmc-tdc.h"
#include "hw/tdc_regs.h"
......@@ -187,8 +188,7 @@ static irqreturn_t ft_irq_handler(int irq, void *dev_id)
struct fmctdc_dev *ft = fmc->mezzanine_data;
uint32_t irq_stat;
irq_stat = fmc_readl(ft->fmc, ft->ft_irq_base + TDC_REG_IRQ_STATUS);
irq_stat >>= ft->irq_shift;
irq_stat = fmc_readl(ft->fmc, ft->ft_irq_base + TDC_REG_EIC_ISR); /* clear the IRQ */
if( likely (irq_stat & TDC_IRQ_TDC_TSTAMP))
{
......@@ -288,26 +288,21 @@ static void ft_readout_tasklet(unsigned long arg)
out:
/* ack the irq */
fmc_writel(ft->fmc, TDC_IRQ_TDC_TSTAMP << ft->irq_shift,
ft->ft_irq_base + TDC_REG_IRQ_STATUS);
fmc_writel(ft->fmc, TDC_IRQ_TDC_TSTAMP, ft->ft_irq_base + TDC_REG_EIC_ISR);
fmc->op->irq_ack(fmc);
}
int ft_irq_init(struct fmctdc_dev *ft)
{
uint32_t irq_en;
tasklet_init(&ft->readout_tasklet, ft_readout_tasklet,
(unsigned long)ft);
/* disable coalescing, it's currently broken */
/* IRQ coalescing: 40 timestamps or 40 milliseconds */
ft_writel(ft, 1, TDC_REG_IRQ_THRESHOLD);
ft_writel(ft, 0, TDC_REG_IRQ_TIMEOUT);
/* enable timestamp readout irq */
irq_en = fmc_readl(ft->fmc, ft->ft_irq_base + TDC_REG_IRQ_ENABLE);
fmc_writel(ft->fmc, irq_en | (TDC_IRQ_TDC_TSTAMP << ft->irq_shift),
ft->ft_irq_base + TDC_REG_IRQ_ENABLE);
fmc_writel(ft->fmc, TDC_IRQ_TDC_TSTAMP, ft->ft_irq_base + TDC_REG_EIC_IER);
/* configure the actual handler via a carrier-specific mechanism */
return ft->carrier_specific->setup_irqs(ft, ft_irq_handler);
......@@ -315,7 +310,7 @@ int ft_irq_init(struct fmctdc_dev *ft)
void ft_irq_exit(struct fmctdc_dev *ft)
{
fmc_writel(ft->fmc, 0, ft->ft_irq_base + TDC_REG_IRQ_ENABLE);
fmc_writel(ft->fmc, ~0, ft->ft_irq_base + TDC_REG_EIC_IDR);
ft->carrier_specific->disable_irqs(ft);
}
......@@ -74,7 +74,7 @@ static int ft_spec_copy_timestamps(struct fmctdc_dev *ft, int base_addr,
{
struct ft_spec_data *cspec = ft->carrier_data;
uint32_t status;
int i, ret;
int i, ret = 0;
cspec->dma_addr =
dma_map_single(ft->fmc->hwdev, (char *)dst, size, DMA_FROM_DEVICE);
......
......@@ -89,7 +89,11 @@ static int ft_svec_setup_irqs(struct fmctdc_dev *ft, irq_handler_t handler)
{
int ret;
ret = ft->fmc->op->irq_request(ft->fmc, handler, "fmc-tdc", IRQF_SHARED);
/* pass the core's base addr as the VIC IRQ vector. */
/* fixme: vector table points to the bridge instead of the core's base address */
ft->fmc->irq = ft->ft_core_base - 0x10000;
ret = ft->fmc->op->irq_request(ft->fmc, handler, "fmc-tdc", 0);
if (ret < 0) {
dev_err(&ft->fmc->dev, "Request interrupt failed: %d\n", ret);
......
......@@ -44,13 +44,13 @@
#define TDC_INPUT_ENABLE_FLAG BIT(7)
/* IRQ controler registers */
#define TDC_REG_IRQ_MULTI 0x0
#define TDC_REG_IRQ_STATUS 0x4
#define TDC_REG_IRQ_ENABLE 0x8
#define TDC_REG_EIC_IDR 0x0
#define TDC_REG_EIC_IER 0x4
#define TDC_REG_EIC_IMR 0x8
#define TDC_REG_EIC_ISR 0xc
/* IRQ status/enable bits */
#define TDC_IRQ_TDC_TSTAMP BIT(2)
#define TDC_IRQ_TDC_ERROR BIT(4)
#define TDC_IRQ_TDC_TSTAMP BIT(0)
#define TDC_EVENT_BUFFER_SIZE 256
#define TDC_EVENT_CHANNEL_MASK 0xF
......
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