Programming languages used in this repository
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VHDL
86.26 %
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Stata
5.04 %
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SystemVerilog
4.06 %
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Makefile
3.7 %
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Python
0.66 %
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Lua
0.16 %
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Verilog
0.11 %
Commit statistics for master Mar 09 - Dec 19
- Total: 217 commits
- Average per day: 0.1 commits
- Authors: 9
Commits per day of month
Commits per weekday
Commits per day hour (UTC)