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FMC TDC 1ns 5cha - Gateware
Commit e8673e88 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski
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testbench/include: fix TDC EIC register addresses. THEY ARE BADLY GENERATED by… 

testbench/include: fix TDC EIC register addresses. THEY ARE BADLY GENERATED by WBGEN, if the driver uses a wbgen-produced .h file cross-check agains the .vh file in this commit!
parent d4939966
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Showing with 4 additions and 4 deletions
hdl/testbench/include/tdc_eic_wb_regs.vh
View file @ e8673e88
`define ADDR_TDC_EIC_EIC_IDR 6'h20
`define ADDR_TDC_EIC_EIC_IDR 6'h00
`define TDC_EIC_EIC_IDR_TDC_FIFO1_OFFSET 0
`define TDC_EIC_EIC_IDR_TDC_FIFO1 32'h00000001
`define TDC_EIC_EIC_IDR_TDC_FIFO2_OFFSET 1
......@@ -19,7 +19,7 @@
`define TDC_EIC_EIC_IDR_TDC_DMA4 32'h00000100
`define TDC_EIC_EIC_IDR_TDC_DMA5_OFFSET 9
`define TDC_EIC_EIC_IDR_TDC_DMA5 32'h00000200
`define ADDR_TDC_EIC_EIC_IER 6'h24
`define ADDR_TDC_EIC_EIC_IER 6'h04
`define TDC_EIC_EIC_IER_TDC_FIFO1_OFFSET 0
`define TDC_EIC_EIC_IER_TDC_FIFO1 32'h00000001
`define TDC_EIC_EIC_IER_TDC_FIFO2_OFFSET 1
......@@ -40,7 +40,7 @@
`define TDC_EIC_EIC_IER_TDC_DMA4 32'h00000100
`define TDC_EIC_EIC_IER_TDC_DMA5_OFFSET 9
`define TDC_EIC_EIC_IER_TDC_DMA5 32'h00000200
`define ADDR_TDC_EIC_EIC_IMR 6'h28
`define ADDR_TDC_EIC_EIC_IMR 6'h08
`define TDC_EIC_EIC_IMR_TDC_FIFO1_OFFSET 0
`define TDC_EIC_EIC_IMR_TDC_FIFO1 32'h00000001
`define TDC_EIC_EIC_IMR_TDC_FIFO2_OFFSET 1
......@@ -61,7 +61,7 @@
`define TDC_EIC_EIC_IMR_TDC_DMA4 32'h00000100
`define TDC_EIC_EIC_IMR_TDC_DMA5_OFFSET 9
`define TDC_EIC_EIC_IMR_TDC_DMA5 32'h00000200
`define ADDR_TDC_EIC_EIC_ISR 6'h2c
`define ADDR_TDC_EIC_EIC_ISR 6'h0c
`define TDC_EIC_EIC_ISR_TDC_FIFO1_OFFSET 0
`define TDC_EIC_EIC_ISR_TDC_FIFO1 32'h00000001
`define TDC_EIC_EIC_ISR_TDC_FIFO2_OFFSET 1
......
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