Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
F
FMC TDC 1ns 5cha - Gateware
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
1
Issues
1
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
FMC TDC 1ns 5cha - Gateware
Commits
cd6e955a
Commit
cd6e955a
authored
Nov 11, 2011
by
serrano
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
One more file reviewed.
git-svn-id:
http://svn.ohwr.org/fmc-tdc@68
85dfdc96-de2c-444c-878d-45b388be74a9
parent
3f142deb
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
7 additions
and
0 deletions
+7
-0
javier.txt
hdl/spec/src/code_review_08-11-2011/javier.txt
+7
-0
No files found.
hdl/spec/src/code_review_08-11-2011/javier.txt
View file @
cd6e955a
...
...
@@ -46,3 +46,10 @@ in its name.
Line 571. cs will not use an IOB FF because it is read in line
366. Please check all other cases when this can happen.
one_hz_gen.vhd
==============
Line 153. Similar comments on metastability as before. Also, the
assumption on the clock frequency of s_acam_refclk is very strong and
might be in trouble if sampling happens close to the edges and the
signals are a bit jittery. Why is this "frequency test" needed?
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment