Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
F
FMC TDC 1ns 5cha - Gateware
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
1
Issues
1
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
FMC TDC 1ns 5cha - Gateware
Commits
c3fb1c5a
Commit
c3fb1c5a
authored
Apr 24, 2020
by
Tomasz Wlostowski
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
updated submodules (fixes for reset polarity of the DDR controller)
parent
745e912c
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
2 additions
and
2 deletions
+2
-2
ddr3-sp6-core
hdl/ip_cores/ddr3-sp6-core
+1
-1
spec
hdl/ip_cores/spec
+1
-1
No files found.
ddr3-sp6-core
@
3879a6d3
Subproject commit
1a1293900e6334bc41251ee84d0ae7d19980e584
Subproject commit
3879a6d33227704f8925e76eb68064da155de2b0
spec
@
c95da978
Subproject commit
b3d2bfc24e01b95acef5d4240cb476c3f2f42566
Subproject commit
c95da978ff08274abd3deae871462b1ff5bc01b7
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment