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FMC TDC 1ns 5cha - Gateware
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FMC TDC 1ns 5cha - Gateware
Commits
136154cf
Commit
136154cf
authored
Oct 01, 2019
by
Evangelia Gousiou
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wip spec simulation
parent
6fa0c8c7
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4 changed files
with
69 additions
and
38 deletions
+69
-38
acam_model.svh
hdl/testbench/include/acam_model.svh
+1
-0
buildinfo_pkg.vhd
hdl/testbench/spec/buildinfo_pkg.vhd
+2
-2
main.sv
hdl/testbench/spec/main.sv
+42
-7
wave.do
hdl/testbench/spec/wave.do
+24
-29
No files found.
hdl/testbench/include/acam_model.svh
View file @
136154cf
...
...
@@ -169,6 +169,7 @@ module tdc_gpx_model
always
@
(
posedge
TStop
[
gch
+
1
]
or
negedge
TStop
[
gch
+
1
])
if
(
PuResN
&&
!
StopDis
[(
gch
/
2
)
+
1
])
begin
//if(PuResN) begin
automatic
acam_hit_t
hit
;
if
(
g_verbose
)
...
...
hdl/testbench/spec/buildinfo_pkg.vhd
View file @
136154cf
...
...
@@ -6,8 +6,8 @@ package buildinfo_pkg is
constant
buildinfo
:
string
:
=
"buildinfo:1"
&
LF
&
"module:main"
&
LF
&
"commit:
fdef93deaa461521b973a709efa4e9b9103592c5
"
&
LF
&
"commit:
6fa0c8c704d7778c5ae05683e55986f346bc2066
"
&
LF
&
"syntool:modelsim"
&
LF
&
"syndate:2019-
09-30, 10:33
CEST"
&
LF
&
"syndate:2019-
10-01, 11:52
CEST"
&
LF
&
"synauth:Evangelia Gousiou"
&
LF
;
end
buildinfo_pkg
;
hdl/testbench/spec/main.sv
View file @
136154cf
...
...
@@ -47,17 +47,19 @@ class FmcTdcDriver;
task
automatic
init
()
;
uint32_t
d
;
$
display
(
"!!!base: %x"
,
m_base
)
;
readl
(
'h20000
,
d
)
;
$
display
(
"address 0x20000: %x"
,
d
)
;
readl
(
'h0
,
d
)
;
if
(
d
!=
'h5344422d
)
begin
$
error
(
"!!!!address 0x0 %x!!!!"
,
d
)
;
$
error
(
"Can't read the SDB signature."
)
;
$
stop
;
end
$
display
(
"address 0x20000: %x"
,
d
)
;
readl
(
'h208c
,
d
)
;
$
display
(
"!!!address 0x2208c: %x"
,
d
)
;
writel
(
'h20a0
,
1234
)
;
// set UTC
...
...
@@ -255,11 +257,44 @@ module main;
acc
.
read
(
'h2208c
,
d
)
;
$
display
(
"address 0x2208c: %x"
,
d
)
;
acc
.
write
(
'h22080
,
1234
)
;
// starting UTC
acc
.
write
(
'h220fc
,
1
<<
9
)
;
// load UTC
//acc.write('h22080, 1234); // starting UTC
//acc.write('h220fc, 1<<9); // load UTC
//acc.write('h22080, 1234); //
//acc.write('h220fc, 1<<9); //
//acc.write('h23004, 'h1f); //
//writel('h3004, 'h1f); // enable EIC irqs for all FIFO channels
//acc.write('h22084, 'h1f0000); //
//writel('h2084, 'h1f0000); // enable all ACAM inputs
//acc.write('h22090, 2); //
//writel('h2090, 2); // FIFO threshold = 2 ts
//acc.write('h22094, 2); //
//writel('h2094, 2); // FIFO threshold = 2 ms
//acc.write('h220FC, (1<<0)); //
//writel('h20fc, (1<<0)); // start acquisition
//acc.write('h220BC, ((-1)<<1)); //
//writel('h20bc, ((-1)<<1));
//writel('h20a0, 1234); // set UTC
//writel('h20fc, 1<<9); // load UTC
//writel('h3004, 'h1f); // enable EIC irqs for all FIFO channels
//writel('h2084, 'h1f0000); // enable all ACAM inputs
//writel('h2090, 2); // FIFO threshold = 2 ts
//writel('h2094, 2); // FIFO threshold = 2 ms
//writel('h20fc, (1<<0)); // start acquisition
//writel('h20bc, ((-1)<<1));
drv
=
new
(
acc
,
'h
4
0000
,
0
)
;
drv
=
new
(
acc
,
'h
2
0000
,
0
)
;
drv
.
init
()
;
$
display
(
"Start operation"
)
;
...
...
hdl/testbench/spec/wave.do
View file @
136154cf
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/clk_i
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/rst_i
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/int_flag_i
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/int_flag_delay_i
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/utc_p_i
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/current_retrig_nb_o
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/roll_over_incr_recent_o
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/clk_i_cycles_offset_o
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/roll_over_nb_o
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/retrig_nb_offset_o
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/clk_i_cycles_offset
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/current_cycles
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/current_cycles2
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/current_retrig_nb
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/current_retrig_nb2
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/retrig_nb_offset
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/retrig_p
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/roll_over_c
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/roll_over_c2
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/int_flag_r
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/int_flag_f
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/int_flag
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/int_flag_d
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/int_flag_p
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/retrig_cnt
add wave -noupdate -expand -group retrig /main/DUT/cmp_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/start_retrigger_block/retrig_p2
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/clk_i
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/rst_i
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/utc_p_i
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/state_active_p_i
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/activate_acq_p_i
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/deactivate_acq_p_i
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/start_from_fpga_o
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/stop_dis_o
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/acam_intflag_f_edge_p
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/start_pulse
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/wait_for_utc
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/rst_n
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/acam_timing_block/wait_for_state_active
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/data_engine_block/engine_st
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/data_engine_block/acam_cyc
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/data_engine_block/acam_stb
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/data_engine_block/acam_we
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/data_engine_block/acam_adr
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/data_engine_block/acam_ef1_i
add wave -noupdate /main/DUT/cmp_fmc_tdc_mezzanine/cmp_tdc_mezz/cmp_tdc_core/data_engine_block/acam_ef2_i
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {133152732 ps} 0}
configure wave -namecolwidth 177
WaveRestoreCursors {{Cursor 1} {10122127 ps} 0}
quietly wave cursor active 1
configure wave -namecolwidth 383
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 1
...
...
@@ -42,4 +37,4 @@ configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {
634062951 ps} {634126951
ps}
WaveRestoreZoom {
13870017 ps} {15197065
ps}
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