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FMC-PROFINET
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remove acid traps at some pads
#86
· opened
May 06, 2021
by
Grzegorz Daniluk
layout-v1.0
cosmetics
CLOSED
1
updated
Oct 26, 2023
The P1V5 and VADJ planes stray unneccessarily
#90
· opened
Jun 03, 2021
by
Christos Gentsos
layout-v1.0
Layout Review V1.0
CLOSED
4
updated
Jun 08, 2021
Consider making core between L6 and L7 thicker
#91
· opened
Jun 03, 2021
by
Christos Gentsos
layout-v1.0
Layout Review V1.0
CLOSED
1
updated
Jun 07, 2021
DC/DC layout issues
#60
· opened
Mar 17, 2021
by
Christos Gentsos
layout-v1.0
critical
Layout Review V1.0
CLOSED
3
updated
Jun 03, 2021
L10: expand Vadj plane at X:4962mil Y:4289mil
#87
· opened
May 06, 2021
by
Grzegorz Daniluk
layout-v1.0
CLOSED
1
updated
Jun 03, 2021
Remove GND polygons from signal layers
#68
· opened
Mar 18, 2021
by
Grzegorz Daniluk
layout-v1.0
critical
CLOSED
1
updated
Jun 03, 2021
The ERTEC IC is missing decoupling capacitors on its Vadj bank
#88
· opened
May 07, 2021
by
Christos Gentsos
layout-v1.0
Layout Review V1.0
CLOSED
2
updated
Jun 03, 2021
The P1V5 plane gets way too thin at certain points
#89
· opened
May 10, 2021
by
Christos Gentsos
layout-v1.0
Layout Review V1.0
CLOSED
2
updated
Jun 03, 2021
[L1] X:4800mil, Y:4100mil mix of tracks and GND polygon create acid traps
#55
· opened
Mar 16, 2021
by
Grzegorz Daniluk
layout-v1.0
CLOSED
1
updated
May 17, 2021
[L10] X:5200mil Y:3900mil P3V3A polygon stretch can be removed as it does not connect to anything
#76
· opened
Mar 18, 2021
by
Grzegorz Daniluk
layout-v1.0
cosmetics
CLOSED
1
updated
May 17, 2021
Routing for memories
#77
· opened
Mar 18, 2021
by
Grzegorz Daniluk
layout-v1.0
question
CLOSED
2
updated
May 17, 2021
[L1] X:4653mil Y:4085mil very thin 4mil track to P3V3 decoupling cap
#75
· opened
Mar 18, 2021
by
Grzegorz Daniluk
layout-v1.0
CLOSED
1
updated
May 17, 2021
FMC connector: Use separate via for each power pin
#71
· opened
Mar 18, 2021
by
Grzegorz Daniluk
layout-v1.0
critical
CLOSED
1
updated
May 17, 2021
Memories should be routed in a fly-by topology
#61
· opened
Mar 17, 2021
by
Grzegorz Daniluk
layout-v1.0
critical
CLOSED
2
updated
May 17, 2021
Not enough reference planes in the board stack-up
#78
· opened
Mar 18, 2021
by
Christos Gentsos
layout-v1.0
critical
Layout Review V1.0
CLOSED
2
updated
May 17, 2021
PCB: URL and OHL text missing
#51
· opened
Mar 16, 2021
by
Erik van der Bij
layout-v1.0
critical
Layout Review V1.0
CLOSED
2
updated
May 17, 2021
Frontpanel: shows XXXXX
#50
· opened
Mar 16, 2021
by
Erik van der Bij
layout-v1.0
critical
Layout Review V1.0
CLOSED
2
updated
May 17, 2021
Provide clean return path by providing each GND pin with its own via to GND plane
#69
· opened
Mar 18, 2021
by
Grzegorz Daniluk
layout-v1.0
critical
CLOSED
1
updated
May 16, 2021
Change test points to a different component with smaller footprint
#80
· opened
Mar 19, 2021
by
Grzegorz Daniluk
layout-v1.0
cosmetics
CLOSED
0
updated
May 06, 2021
Unify traces thickness
#79
· opened
Mar 19, 2021
by
Grzegorz Daniluk
layout-v1.0
cosmetics
CLOSED
0
updated
May 06, 2021
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