FPGA configured through SPI Flash or through the GN4124 SPRI interface
The application FPGA can be programmed either through SPI Flash or through the GN4124 SPRI interface. Unfortunately as both interfaces are not compatible on the same PCB.
* SPI Flash configuration suits applications where:
- The application FPGA needs to be configured soon after power up.
- The application FPGA could reprogram itself without the intervention of any software.
- Stand alone operation is required. This is a low cost platform scenario. The FPGA would communicate to the external world through the SPF and use the PCIe connector only as a power supply.
- An eeprom is needed to store non volatile data.
- The software driver could also have full control on the FPGA configuration, but for this the driver should write the FPGA bitstream on the SPI flash or check that the bitstream is already in its right location.
* GN4124 SPRI configuration is well adapted for applications where:
- The software driver has full control on the FPGA configuration.
- The software driver always loads the FPGA configuration. Notice that the FPGA will not be configured unless the driver does it.
The mounting options are (jtag_chain.SchDoc)):
R85 | R87 | R59 | R277 | R274 | R253 | IC14 | R268 | R267 | R60 | R64 | |
---|---|---|---|---|---|---|---|---|---|---|---|
GN4124 SPRI | ON | ON | ON | ON | OFF | ON | OFF | ON | OFF | ON | OFF |
SPI Flash | OFF | OFF | OFF | OFF | ON | OFF | ON | OFF | ON | ON | OFF |
The HSWAP pin should also be configured correctly. Please check the
section:
FPGA-HSWAP-tied-to-VADJ,-P3V3,-to-GND-or-SPRI-XI-SWAP
Back to Configuration-Options
Pablo Alvarez 16/11/2010
(M1, M0 register corrected)
Pablo Alvarez 16/09/2010