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Behavioral Architecture Reference
Collaboration diagram for Behavioral:
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## Processes

PROCESS_3 | ( clk_i )

## Signals

sreg | std_logic_vector ( 1 downto 0 )

## Attributes

TIG | string
IOB | string
ASYNC_REG | string
SHIFT_EXTRACT | string
HBLKNM | string
TIG | async_i : signal is " TRUE "
IOB | async_i : signal is " FALSE "
ASYNC_REG | sreg : signal is " TRUE "
SHIFT_EXTRACT | sreg : signal is " NO "
HBLKNM | sreg : signal is " sync_reg "

## Detailed Description

Synchronize 1 bit of data

The documentation for this class was generated from the following file:

- /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/firmware/hdl/common/Reg_2clks.vhd