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pulse_shaper_scorer Entity Reference

Checks that pulse_shaper is behaving correctly. Check for Output goes high when input goes high ( asyncnronous to system clock). Output goes low again a controllable number of clock cycles later, synchronous with the rising edge of the clock. Gap of at least one clock cycle before output goes high again. More...

Inheritance diagram for pulse_shaper_scorer:
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## Entities

rtl | architecture

## Ports

clk_i | in std_logic
pulse_in_a_i | in std_logic
pulse_out_a_i | in std_logic pulse_length_i
| Parameter to pulse_strecher.

## Detailed Description

Checks that pulse_shaper is behaving correctly. Check for Output goes high when input goes high ( asyncnronous to system clock). Output goes low again a controllable number of clock cycles later, synchronous with the rising edge of the clock. Gap of at least one clock cycle before output goes high again.

## Member Data Documentation

clk_i in std_logic

Port

Todo:

The documentation for this class was generated from the following file:

- /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/firmware/hdl/test/pulse_shaper_scorer.vhdl