All Classes Files Functions Variables Pages
rtl Architecture Reference

## Signals

clk125 | STD_LOGIC
ipb_clk | STD_LOGIC
locked | STD_LOGIC
rst_125 | STD_LOGIC
rst_ipb | STD_LOGIC
onehz | STD_LOGIC
ipb_clk_n | STD_LOGIC
mac_txd | STD_LOGIC_VECTOR ( 7 downto 0 )
mac_rxd | STD_LOGIC_VECTOR ( 7 downto 0 )
mac_txdvld | STD_LOGIC
mac_txack | STD_LOGIC
mac_rxclko | STD_LOGIC
mac_rxdvld | STD_LOGIC
mac_rxgoodframe | STD_LOGIC
mac_rxbadframe | STD_LOGIC
ipb_master_out | ipb_wbus
ipb_master_in | ipb_rbus
mac_addr | std_logic_vector ( 47 downto 0 )
ip_addr | std_logic_vector ( 31 downto 0 )
hostbus_in | emac_hostbus_in
hostbus_out | emac_hostbus_out
i2c_sda_oen_s | std_logic
i2c_scl_oen_s | std_logic

The documentation for this class was generated from the following file:

- /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/firmware/hdl/test/fmc_tlu_top_sp601.vhd