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rtl Architecture Reference

## Processes

register_signals | ( clk_4x_logic_i , strobe_4x_logic_i , s_veto )

## Signals

s_intermediate_busy_or | std_logic_vector ( g_NUM_DUTS downto 0 )
s_veto | std_logic
s_strobe_4x_logic_d1 | std_logic
s_busy_from_dut | std_logic_vector ( g_NUM_DUTS - 1 downto 0 )
s_clk_from_dut | std_logic_vector ( g_NUM_DUTS - 1 downto 0 )
s_reset_or_clk_to_dut | std_logic_vector ( g_NUM_DUTS - 1 downto 0 )
s_trigger_to_dut | std_logic_vector ( g_NUM_DUTS - 1 downto 0 )
s_shutter_to_dut | std_logic_vector ( g_NUM_DUTS - 1 downto 0 )

## Instantiations

busy_ibufds_inst | ibufds
trig_obufds_inst | obufds
clk_rst_obufds_inst | obufds

The documentation for this class was generated from the following files:

- /projects/HEP_Instrumentation/cad/designs/fmc-mtlu/trunk/firmware/hdl/common/DUTInterfaces_rtl.vhd