AIDA FMC Mini-TLU
Firmware for FMC-based mini-TLU (Trigger/Timing/Tagging Logic Unit) for AIDA
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rtl Architecture Reference

Processes

p_input_clock_logic  ( clk_input_i )
p_output_clock_logic  ( clk_output_i )

Signals

s_pulse_out  std_logic := ' 0 '
s_pulse_out_d1  std_logic := ' 0 '
s_pulse_out_d2  std_logic := ' 0 '
s_pulse_out_d3  std_logic := ' 0 '
s_pulse_out_d4  std_logic := ' 0 '
s_pulse_back_d1  std_logic := ' 0 '
s_pulse_back_d2  std_logic := ' 0 '

The documentation for this class was generated from the following file: