AIDA FMC Mini-TLU
Firmware for FMC-based mini-TLU (Trigger/Timing/Tagging Logic Unit) for AIDA
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rtl Architecture Reference

Constants

NSLV  positive := 7

Signals

ipbw  ipb_wbus_array ( NSLV - 1 downto 0 )
ipbr  ipb_rbus_array ( NSLV - 1 downto 0 )
ipbr_d  ipb_rbus_array ( NSLV - 1 downto 0 )
cbc_i2c_scl_o_int  std_logic
ctrl_reg  std_logic_vector ( 31 downto 0 )
s_pulse_reg  std_logic_vector ( 31 downto 0 )
s_cbc_reset  std_logic := ' 0 '
s_cap_trg  std_logic := ' 0 '

Instantiations

fabric  work.ipbus_fabric
slave0  ipbus_ver <Entity ipbus_ver>
slave1  work.ipbus_reg
slave2  work.ipbus_pulser
cbcstuff  work.cbc_logic
slave3  work.i2c_master_top
 Active low reset.
slave4  work.i2c_master_top
 Active low reset.
slave5  work.ipbus_capture_buffer
 Width of WB bus.
slave6  work.ipbus_emac_hostbus

Member Data Documentation

slave5 work.ipbus_capture_buffer
Instantiation

Width of WB bus.

size of RAM = 2^ram_address_width


The documentation for this class was generated from the following file: