AIDA FMC Mini-TLU
Firmware for FMC-based mini-TLU (Trigger/Timing/Tagging Logic Unit) for AIDA
 All Classes Files Functions Variables Pages
dtype_fdpe Entity Reference
Inheritance diagram for dtype_fdpe:

Entities

dtype_V  architecture
 

Ports

Q   out std_logic
 Output.
CLK   in std_logic
 Clock - rising edge active.
D   in std_logic
 Input.
CE   in std_logic
 Clock enable.
PRE   in std_logic
 Asynchronous preload.

The documentation for this class was generated from the following file: